In:
Japanese Journal of Applied Physics, IOP Publishing, Vol. 36, No. 3S ( 1997-03-01), p. 1325-
Abstract:
In this paper it will be shown that polysilicon encapsulated local oxidation of silicon (PE-LOCOS) is a feasible lateral isolation technique for quarter-micron or smaller complementary metal-oxide-semiconductor (CMOS) technologies. This isolation technique features limited process complexity and very good manufacturability and reproducibility, together with excellent bird's beak and active area dimension control. Electrical measurements performed on perimeter intensive gate oxide capacitors and diodes show no isolation-edge-related degradation, which is confirmed by Raman spectroscopy and emission microscopy measurements. Transistor narrow-channel data from devices fabricated with PE-LOCOS are presented and discussed.
Type of Medium:
Online Resource
ISSN:
0021-4922
,
1347-4065
DOI:
10.1143/JJAP.36.1325
Language:
Unknown
Publisher:
IOP Publishing
Publication Date:
1997
detail.hit.zdb_id:
218223-3
detail.hit.zdb_id:
797294-5
detail.hit.zdb_id:
2006801-3
detail.hit.zdb_id:
797295-7
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