Format:
1 online resource (158 pages)
Edition:
1st ed.
ISBN:
9783319087535
Content:
Provides an introduction to electronic system-level (ESL) design, along with background on simulation execution semantics for ESL models Discusses discrete event simulation, along with synchronous and out-of-order parallel discrete simulation approaches, including the underlying data structure, the scheduling algorithm, and the predictive static code analysis technique Includes guidelines for choosing among different simulation and diagnosis approaches for models with different features Presents the model analysis approaches to increase the observability for parallel ESL model development.
Content:
Intro -- Foreword -- Preface -- Acknowledgments -- Contents -- Acronyms -- 1 Introduction -- 1.1 System-Level Design -- 1.1.1 Levels of Abstraction -- 1.1.2 The Y-Chart -- 1.1.3 System-Level Design Methodologies -- 1.1.4 Electronic System-Level Design Process -- 1.2 Validation and Simulation -- 1.2.1 Language Support for System-Level Design -- 1.2.2 System Simulation Approaches -- 1.2.3 Discrete Event Simulation -- 1.3 Goals -- 1.4 Overview -- 1.5 Related Work -- 1.5.1 The SpecC Language -- 1.5.2 The SystemC Language -- 1.5.3 The System-on-Chip Environment Design Flow -- 1.5.4 Multicore Technology and Multithreaded Programming -- 1.5.5 Efficient Model Validation and Simulation -- 2 The ConcurrenC Model of Computation -- 2.1 Motivation -- 2.2 Models of Computation -- 2.3 ConcurrenC MoC -- 2.3.1 Relationship to C-based SLDLs -- 2.3.2 ConcurrenC Features -- 2.3.3 Communication Channel Library -- 2.3.4 Relationship to KPN and SDF -- 2.4 Case Study -- 3 Synchronous Parallel Discrete Event Simulation -- 3.1 Traditional Discrete Event Simulation -- 3.2 SLDL Multithreading Semantics -- 3.2.1 Cooperative Multithreading in SystemC -- 3.2.2 Pre-emptive Multithreading in SpecC -- 3.3 Synchronous Parallel Discrete Event Simulation -- 3.4 Synchronization for Multicore Parallel Simulation -- 3.4.1 Protecting Scheduling Resources -- 3.4.2 Protecting Communication -- 3.4.3 Channel Locking Scheme -- 3.4.4 Automatic Code Instrumentation for Communication Protection -- 3.5 Implementation Optimization for Multicore Simulation -- 3.6 Experiments and Results -- 3.6.1 Case Study on a H.264 Video Decoder -- 3.6.2 Case Study on a JPEG Encoder -- 4 Out-of-Order Parallel Discrete Event Simulation -- 4.1 Motivation -- 4.2 Out-of-Order Parallel Discrete Event Simulation -- 4.2.1 Notations -- 4.2.2 Out-of-Order PDES Scheduling Algorithm.
Note:
Description based on publisher supplied metadata and other sources
Additional Edition:
9783319087528
Additional Edition:
Erscheint auch als Druck-Ausgabe 9783319087528
Language:
English
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