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  • Mathematics  (2)
  • SA 3060  (2)
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  • Mathematics  (2)
RVK
  • SA 3060  (2)
  • 1
    Online Resource
    Online Resource
    Association for Computing Machinery (ACM) ; 1984
    In:  ACM SIGMICRO Newsletter Vol. 15, No. 4 ( 1984-12), p. 285-295
    In: ACM SIGMICRO Newsletter, Association for Computing Machinery (ACM), Vol. 15, No. 4 ( 1984-12), p. 285-295
    Abstract: This paper surveys results reported on resource allocation in optimizing microcode compilers. Resource allocation is the phase of microcode generation that binds variables and operators of program text to machine registers and functional units. The first substantial results on resource allocation in optimizing microcode compilers were reported by DeWitt, and subsequent results were reported by Kim and Tan and by Ma and Lewis. We examine each of these methods, focusing on the assumptions they make, how realistic those assumptions are, the algorithms employed and their foundational basis, the perceived difficulty of implementing the algorithms, their effectiveness, and their computational complexity. We conclude by summarizing the results and pointing out important areas for future research, particularly in the context of flow graph microcode generation .
    Type of Medium: Online Resource
    ISSN: 1050-916X
    RVK:
    Language: English
    Publisher: Association for Computing Machinery (ACM)
    Publication Date: 1984
    detail.hit.zdb_id: 243814-8
    detail.hit.zdb_id: 2089076-X
    Library Location Call Number Volume/Issue/Year Availability
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  • 2
    Online Resource
    Online Resource
    Association for Computing Machinery (ACM) ; 1986
    In:  ACM SIGMICRO Newsletter Vol. 17, No. 4 ( 1986-12-21), p. 104-115
    In: ACM SIGMICRO Newsletter, Association for Computing Machinery (ACM), Vol. 17, No. 4 ( 1986-12-21), p. 104-115
    Abstract: There are a growing number of micro-architectures that employ pipelined array units for high-speed floating point applications. To obtain the performance required in such applications, effective loop optimization is crucial. The loop optimization problem for micro-architectures with pipelined processing units is similar to the problem of array processor loop optimization. The URPR method has been proven to be an effective, low-complexity approach to optimizing loops in array processor programs, so we conducted a case study of the method applied to a representative pipelined microarchitecture based on the AMD29500 chip family. The results of applying two URPR compaction algorithms and a new compaction algorithm to the 29500-based micro-architecture are presented. With the new compaction algorithm, we were able to realize microcode as efficient as the complex microcode manually derived by AMD.
    Type of Medium: Online Resource
    ISSN: 1050-916X
    RVK:
    Language: English
    Publisher: Association for Computing Machinery (ACM)
    Publication Date: 1986
    detail.hit.zdb_id: 243814-8
    detail.hit.zdb_id: 2089076-X
    Library Location Call Number Volume/Issue/Year Availability
    BibTip Others were also interested in ...
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