In:
SID Symposium Digest of Technical Papers, Wiley, Vol. 41, No. 1 ( 2010-05), p. 54-57
Abstract:
A 10b DAC with multicurrent path control and the weighted transconductors reduces the data driver size by 30%, compared with the previous art. Coarse and fine interpolation provides two additional bits in the proposed technique. The DAC is fabricated in a 90nm CMOS process and consumes 1.1 μA of static current per a channel. INL, DNL and minimum DVO are 0.8LSB, 0.37LSB and 6.5mV, respectively, in 20KΩ and 30pF of the load condition.
Type of Medium:
Online Resource
ISSN:
0097-966X
,
2168-0159
Language:
English
Publisher:
Wiley
Publication Date:
2010
detail.hit.zdb_id:
2526337-7
Bookmarklink