In:
PLOS ONE, Public Library of Science (PLoS), Vol. 16, No. 3 ( 2021-3-29), p. e0249269-
Abstract:
Area efficient and high speed forward error correcting codes decoder are the demand of many high speed next generation communication standards. This paper explores a low complexity decoding algorithm of low density parity check codes, called the min-sum iterative construction a posteriori probability (MS-IC-APP), for this purpose. We performed the error performance analysis of MS-IC-APP for a (648,1296) regular QC-LDPC code and proposed an area and throughput optimized hardware implementation of MS-IC-APP. We proposed to use the layered scheduling of MS-IC-APP and performed other optimizations at architecture level to reduce the area and to increase the throughput of the decoder. Synthesis results show 6.95 times less area and 4 times high throughput as compared to the standard min-sum decoder. The area and throughput are also comparable to the improved variants of hard-decision bit-flipping (BF) decoders, whereas, the simulation results show a coding gain of 2.5 over the best implementation of BF decoder in terms of error performance.
Type of Medium:
Online Resource
ISSN:
1932-6203
DOI:
10.1371/journal.pone.0249269
DOI:
10.1371/journal.pone.0249269.g001
DOI:
10.1371/journal.pone.0249269.g002
DOI:
10.1371/journal.pone.0249269.g003
DOI:
10.1371/journal.pone.0249269.g004
DOI:
10.1371/journal.pone.0249269.g005
DOI:
10.1371/journal.pone.0249269.g006
DOI:
10.1371/journal.pone.0249269.t001
DOI:
10.1371/journal.pone.0249269.s001
Language:
English
Publisher:
Public Library of Science (PLoS)
Publication Date:
2021
detail.hit.zdb_id:
2267670-3
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