UID:
almahu_9949697487102882
Format:
1 online resource (249 p.)
ISBN:
1-281-06033-X
,
9786611060336
,
0-08-050555-4
Series Statement:
Embedded technology series
Content:
Ken Arnold is an experienced embedded systems designer and president of HiTech Equipment, Inc., an embedded systems design firm located in San Diego, California. He also teaches courses in embedded hardware and software design at the University of California-San Diego.Gives the reader an integrated hardware/software approach to embedded controller designStresses a ""worst case"" design approach for the harsh environments in which embedded systems are often usedIncludes design examples to make important concepts come alive
Note:
Includes index.
,
Front Cover; Embedded Controller Hardware Design; Copyright Page; Table of Contents; Preface; Chapter One. Review of Electronics Fundamentals; Objectives; Embedded Microcomputer Applications; Microcomputer and Microcontroller Architectures; Digital Hardware Concepts; Logic Symbols; Timing Diagrams; Multiplexed Bus; Loading and Noise Margin Analysis; The Design and Development Process; Chapter One Problems; Chapter Two. Microcontroller Concepts; Organization: von Neumann vs. Harvard; Microprocessor/Microcontroller Basics; The 8051 Family Microcontroller Processor Architecture
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The 8051 Family Microcontroller Instruction Set SummaryChapter Two Problems; Chapter Three. Worst-Case Timing, Loading, Analysis, and Design; Timing Diagram Notation Conventions; Fan-Out and Loading Analysis-DC and AC; Logic Family IC Characteristics and Interfacing; Design Example: Noise Margin Analysis Spreadsheet; Worst-Case Timing Analysis Example; Chapter Three Review Problems; Chapter Four. Memory Technologies and Interfacing; Memory Taxonomy; Read/Write Memories; Read-Only Memory; Other Memory Types; JEDEC Memory Pin-Outs; Device Programmers; Memory Organization Considerations
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Parametric ConsiderationsAsynchronous vs. Synchronous Memory; Error Detection and Correction; Memory Management; Chapter Four Problems; Chapter Five. CPU Bus Interface and Timing; Read and Write Operations; Address, Data, and Control Buses; Address Spaces and Decoding; Chapter Five Problems; Chapter Six. A Detailed Design Example; The Central Processing Unit (CPU); External Data Memory Cycles; Design Problem 1; Design Problem 2; Design Problem 3; Chapter Six Problems; Chapter Seven. Programmable Logic Devices; Introduction to Programmable Logic; Design Examples
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Simple I/O Decoding and Interfacing Using PLDsIC Design Using PCs; Chapter Seven Problems; Chapter Eight. Basic I/O Interfaces; Direct CPU I/O Interfacing; Simple Input/Output Devices; Program-Controlled I/O Bus Interfacing; Direct Memory Access (DMA); Elementary I/O Devices and Applications; Chapter Eight Problems; Chapter Nine. Other Interfaces and Bus Cycles; Interrupt Cycles; Software Interrupts; Hardware Interrupts; Chapter Ten. Other Useful Stuff; Construction Methods; Electromagnetic Compatibility; Electrostatic Discharge Effects; Fault Tolerance; Hardware Development Tools
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Software Development ToolsOther Specialized Design Considerations; Processor Performance Metrics; Device Selection Process; Chapter Eleven. Other Interfaces; Analog Signal Conversion; Special Proprietary Synchronous Serial Interfaces; Unconventional Use of DRAM for Low Cost Data Storage; Digital Signal Processing/Digital Audio Recording; Appendix A. Hardware Design Checklist; Appendix B. References, Web Links, and Other Sources; Index; Elsevier Science CD-ROM License Agreement
,
English
Additional Edition:
ISBN 1-878707-52-3
Language:
English
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