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  • 1
    UID:
    b3kat_BV019727716
    Format: XXXVI, 671 S. , Ill., graph. Darst.
    ISBN: 1558607668 , 9781558607668
    Language: English
    Subjects: Computer Science , Engineering
    RVK:
    RVK:
    Keywords: Eingebettetes System ; VLIW-Architektur
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  • 2
    UID:
    almahu_9948025888102882
    Format: 1 online resource (708 p.)
    Edition: 1st edition
    ISBN: 1-4933-0365-1 , 9781417574305 , 0-08-047754-2 , 9786611010102 , 1-281-01010-3
    Content: The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design. Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development. In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience. · Complemented by a unique, professional-quality embedded tool-chain on the authors' website, http://www.vliw.org/book · Combines technical depth with real-world experience · Comprehensively explains the differences between general purpose computing systems and embedded systems at the hardware, software, tools and operating system levels. · Uses concrete examples to explain and motivate the trade-offs.
    Note: Bibliographic Level Mode of Issuance: Monograph , English
    Additional Edition: ISBN 1-55860-766-8
    Additional Edition: ISBN 1-4175-7430-5
    Language: English
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  • 3
    UID:
    almahu_9947931008802882
    Format: xxxvi, 671 p. : , ill.
    Edition: Electronic reproduction. Ann Arbor, MI : ProQuest, 2015. Available via World Wide Web. Access may be limited to ProQuest affiliated libraries.
    Language: English
    Keywords: Electronic books.
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  • 4
    UID:
    gbv_1699210489
    Format: Online-Ressource (650 p)
    Edition: Online-Ausg. Amsterdam Elsevier Science & Technology 2007 Electronic reproduction; Mode of access: World Wide Web
    ISBN: 1558607668 , 9781558607668
    Content: Cliff Young
    Content: The fact that there are more embedded computers than general-purpose computers and that we are impacted by hundreds of them every day is no longer news. What is news is that their increasing performance requirements, complexity and capabilities demand a new approach to their design. Fisher, Faraboschi, and Young describe a new age of embedded computing design, in which the processor is central, making the approach radically distinct from contemporary practices of embedded systems design. They demonstrate why it is essential to take a computing-centric and system-design approach to the traditional elements of nonprogrammable components, peripherals, interconnects and buses. These elements must be unified in a system design with high-performance processor architectures, microarchitectures and compilers, and with the compilation tools, debuggers and simulators needed for application development. In this landmark text, the authors apply their expertise in highly interdisciplinary hardware/software development and VLIW processors to illustrate this change in embedded computing. VLIW architectures have long been a popular choice in embedded systems design, and while VLIW is a running theme throughout the book, embedded computing is the core topic. Embedded Computing examines both in a book filled with fact and opinion based on the authors many years of R&D experience. Complemented by a unique, professional-quality embedded tool-chain on the authors' website, http://www.vliw.org/book Combines technical depth with real-world experience Comprehensively explains the differences between general purpose computing systems and embedded systems at the hardware, software, tools and operating system levels. Uses concrete examples to explain and motivate the trade-offs
    Note: Includes bibliography and index , Front Cover; Embedded Computing: A VLIW Approach to Architecture, Compilers and Tools; Copyright Page; Contents; About the Authors; Foreword; Preface; Content and Structure; The VEX (VLIW Example) Computing System; Audience; Cross-cutting Topics; How to Read This Book; Figure Acknowledgments; Acknowledgments; Chapter 1. An Introduction to Embedded Processing; 1.1 What Is Embedded Computing?; 1.2 Distinguishing Between Embedded and General-Purpose Computing; 1.3 Characterizing Embedded Computing; 1.4 Embedded Market Structure; 1.5 Further Reading; 1.6 Exercises , Chapter 2. An Overview of VLIW and ILP2.1 Semantics and Parallelism; 2.2 Design Philosophies; 2.3 Role of the Compiler; 2.4 VLIW in the Embedded and DSP Domains; 2.5 Historical Perspective and Further Reading; 2.6 Exercises; Chapter 3. An Overview of ISA Design; 3.1 Overview: What to Hide; 3.2 Basic VLIW Design Principles; 3.3 Designing a VLIW ISA for Embedded Systems; 3.4 Instruction-set Encoding; 3.5 VLIW Encoding; 3.6 Encoding and Instruction-set Extensions; 3.7 Further Reading; 3.8 Exercises; Chapter 4. Architectural Structures in ISA Design; 4.1 The Datapath; 4.2 Registers and Clusters , 4.3 Memory Architecture4.4 Branch Architecture; 4.5 Speculation and Predication; 4.6 System Operations; 4.7 Further Reading; 4.8 Exercises; Chapter 5. Microarchitecture Design; 5.1 Register File Design; 5.2 Pipeline Design; 5.3 VLIW Fetch, Sequencing, and Decoding; 5.4 The Datapath; 5.5 Memory Architecture; 5.6 The Control Unit; 5.7 Control Registers; 5.8 Power Considerations; 5.9 Further Reading; 5.10 Exercises; Chapter 6. System Design and Simulation; 6.1 System-on-a-Chip (SoC); 6.2 Processor Cores and SoC; 6.3 Overview of Simulation; 6.4 Simulating a VLIW Architecture , 6.5 System Simulation6.6 Validation and Verification; 6.7 Further Reading; 6.8 Exercises; Chapter 7. Embedded Compiling and Toolchains; 7.1 What Is Important in an ILP Compiler?; 7.2 Embedded Cross-Development Toolchains; 7.3 Structure of an ILP Compiler; 7.4 Code Layout; 7.5 Embedded-Specific Tradeoffs for Compilers; 7.6 DSP-Specific Compiler Optimizations; 7.7 Further Reading; 7.8 Exercises; Chapter 8. Compiling for VLIWs and ILP; 8.1 Profiling; 8.2 Scheduling; 8.3 Register Allocation; 8.4 Speculation and Predication; 8.5 Instruction Selection; 8.6 Further Reading; 8.7 Exercises , Chapter 9. The Run-time System9.1 Exceptions, Interrupts, and Traps; 9.2 Application Binary Interface Considerations; 9.3 Code Compression; 9.4 Embedded Operating Systems; 9.5 Multiprocessing and Multithreading; 9.6 Further Reading; 9.7 Exercises; Chapter 10. Application Design and Customization; 10.1 Programming Language Choices; 10.2 Performance, Benchmarking, and Tuning; 10.3 Scalability and Customizability; 10.4 Further Reading; 10.5 Exercises; Chapter 11. Application Areas; 11.1 Digital Printing and Imaging; 11.2 Telecom Applications; 11.3 Other Application Areas; 11.4 Further Reading , 11.5 Exercises , Electronic reproduction; Mode of access: World Wide Web
    Additional Edition: Erscheint auch als Druck-Ausgabe Embedded Computing A VLIW Approach to Architecture, Compilers and Tools
    Language: English
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  • 5
    UID:
    gbv_620010630
    Format: Online-Ressource (XIII, 370 S.)
    Edition: Online-Ausg. 2010 Springer eBook collection. Computer science Electronic reproduction; Available via World Wide Web
    ISBN: 9783642115158
    Series Statement: Lecture notes in computer science 5952
    Note: Literaturangaben , Electronic reproduction; Available via World Wide Web
    Additional Edition: ISBN 3642115144
    Additional Edition: ISBN 9783642115141
    Additional Edition: Erscheint auch als Druck-Ausgabe High performance embedded architectures and compilers Berlin : Springer, 2010 ISBN 3642115144
    Additional Edition: ISBN 9783642115141
    Language: English
    Subjects: Computer Science
    RVK:
    Keywords: Eingebettetes System ; Computerarchitektur ; Compiler ; Supercomputer ; Konferenzschrift
    URL: Volltext  (lizenzpflichtig)
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  • 6
    UID:
    almahu_9947364263002882
    Format: XIII, 370 p. , online resource.
    ISBN: 9783642115158
    Series Statement: Lecture Notes in Computer Science, 5952
    Content: This book constitutes the refereed proceedings of the 5th International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2010, held in Pisa, Italy, in January 2010. The 23 revised full papers presented together with the abstracts of 2 invited keynote addresses were carefully reviewed and selected from 94 submissions. The papers are organized in topical sections on architectural support for concurrency; compilation and runtime systems; reconfigurable and customized architectures; multicore efficiency, reliability, and power; memory organization and optimization; and programming and analysis of accelerators.
    Note: Invited Program -- Embedded Systems as Datacenters -- Larrabee: A Many-Core Intel Architecture for Visual Computing -- Architectural Support for Concurrency -- Remote Store Programming -- Low-Overhead, High-Speed Multi-core Barrier Synchronization -- Improving Performance by Reducing Aborts in Hardware Transactional Memory -- Energy and Throughput Efficient Transactional Memory for Embedded Multicore Systems -- Compilation and Runtime Systems -- Split Register Allocation: Linear Complexity Without the Performance Penalty -- Trace-Based Data Layout Optimizations for Multi-core Processors -- Buffer Sizing for Self-timed Stream Programs on Heterogeneous Distributed Memory Multiprocessors -- Automatically Tuning Sparse Matrix-Vector Multiplication for GPU Architectures -- Reconfigurable and Customized Architectures -- Virtual Ways: Efficient Coherence for Architecturally Visible Storage in Automatic Instruction Set Extensions -- Accelerating XML Query Matching through Custom Stack Generation on FPGAs -- An Application-Aware Load Balancing Strategy for Network Processors -- Memory-Aware Application Mapping on Coarse-Grained Reconfigurable Arrays -- Multicore Efficiency, Reliability, and Power -- Maestro: Orchestrating Lifetime Reliability in Chip Multiprocessors -- Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors -- RELOCATE: Register File Local Access Pattern Redistribution Mechanism for Power and Thermal Management in Out-of-Order Embedded Processor -- Performance and Power Aware CMP Thread Allocation Modeling -- Memory Organization and Optimization -- Multi-level Hardware Prefetching Using Low Complexity Delta Correlating Prediction Tables with Partial Matching -- Scalable Shared-Cache Management by Containing Thrashing Workloads -- SRP: Symbiotic Resource Partitioning of the Memory Hierarchy in CMPs -- DIEF: An Accurate Interference Feedback Mechanism for Chip Multiprocessor Memory Systems -- Programming and Analysis of Accelerators -- Tagged Procedure Calls (TPC): Efficient Runtime Support for Task-Based Parallelism on the Cell Processor -- Analysis of Task Offloading for Accelerators -- Offload – Automating Code Migration to Heterogeneous Multicore Systems -- Computer Generation of Efficient Software Viterbi Decoders.
    In: Springer eBooks
    Additional Edition: Printed edition: ISBN 9783642115141
    Language: English
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