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  • 1
    Online Resource
    Online Resource
    Cambridge :Cambridge University Press,
    UID:
    almafu_9960117135402883
    Format: 1 online resource (xviii, 240 pages) : , digital, PDF file(s).
    ISBN: 1-107-17882-7 , 1-280-91713-X , 9786610917136 , 0-511-32232-1 , 0-511-28972-3 , 0-511-29032-2 , 0-511-28841-7 , 1-60119-729-2 , 0-511-54111-2 , 0-511-28909-X
    Content: Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This 2007 book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.
    Note: Title from publisher's bibliographic system (viewed on 05 Oct 2015). , List of figures; List of tables; Preface; 1. Introduction; 2. Projection-based model order reduction algorithms; 3. Truncated balanced realization methods for model order reduction; 4. Passive balanced truncation of linear systems in descriptor form; 5. Passive hierarchical model order reduction; 6. Terminal reduction of linear dynamic circuits; 7. Vector potential equivalent circuit for inductance modeling; 8. Structure-preserving model order reduction; 9. Block structure-preserving reduction for RLCK circuits; 10. Model optimization and passivity enforcement; 11. General multi-port circuit realization; 12. Model order reduction for multi-terminal linear dynamic circuits; 13. Passive modeling by signal waveform shaping; References; Index. , English
    Additional Edition: ISBN 1-107-41154-8
    Additional Edition: ISBN 0-521-86581-6
    Language: English
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  • 2
    UID:
    b3kat_BV023117204
    Format: 1 Online-Ressource
    ISBN: 9780387239040 , 9780387239057
    Language: English
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  • 3
    Online Resource
    Online Resource
    [Erscheinungsort nicht ermittelbar] : IntechOpen
    UID:
    gbv_1778684939
    Format: 1 Online-Ressource (304 p.)
    ISBN: 9789533078847 , 9789535160922
    Content: This book provides some recent advances in design nanometer VLSI chips. The selected topics try to present some open problems and challenges with important topics ranging from design tools, new post-silicon devices, GPU-based parallel computing, emerging 3D integration, and antenna design. The book consists of two parts, with chapters such as: VLSI design for multi-sensor smart systems on a chip, Three-dimensional integrated circuits design for thousand-core processors, Parallel symbolic analysis of large analog circuits on GPU platforms, Algorithms for CAD tools VLSI design, A multilevel memetic algorithm for large SAT-encoded problems, etc
    Note: English
    Language: English
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  • 4
    UID:
    gbv_1678676489
    Format: 1 Online-Ressource (XLI, 460 Seiten) , Diagramme
    ISBN: 9783030261726
    Series Statement: Springer eBooks
    Content: Part I. New physics-based EM analysis and system-level dynamic reliability management -- Chapter 1. Introduction -- Chapter 2. Physics Based EM Modeling -- Chapter 3. Fast EM Stress Evolution Analysis Using Krylov Subspace Method -- Chapter 4. Fast EM Immortatlity Analysis For Multisegment Copper Interconnect Wires -- Chapter 5. Dynamic EM Models For Transient Stress Evolution and Recovery -- Chapter 6. Compact EM Models for Multi-SEgment Interconnect Wires -- Chapter 7. EM Assesment for Power Grid Networks -- Chapter 8. Resource Based EM Modeling for Multi-Crore Microprocessors -- Chapter 9. DRM and Optimization for Real Time Embedded Systems -- Chapter 10. Learning Based DRM and Energy Optimization for Many Core Dark Silicaon Processors -- Chapter 11. Recovery Aware DRM for Near Threshold Dark Silicon Processors -- Chapter 12. Cross-Layer DRM and Optimization For Datacenter Systems -- Part II. Transistor Aging Effects and Reliability -- 13. Introduction -- Chapter 14. Aging AWare Timings Analysis -- Chapter 15. Aging Aware Standard Cell Library Optimization Methods -- Chapter 16. Aging Effects In Sequential Elements -- Chapter 17. Aging Guardband Reduction Through Selective Flip Flop Optimization -- Chapter 18. Workload Aware Static Aging Monitoring and Mitigation of Timing Critical Flip Flops -- Chapter 19. Aging Relaxation at Micro Architecture Level Using Special NOPS -- Chapter 20. Extratime Modelling and Analyis of Transistor Agin at Microarchitecture Level -- Chapter 21. Reducing Processor Wearout By Exploiting The Timing Slack of Instructions
    Content: This book provides readers with a detailed reference regarding two of the most important long-term reliability and aging effects on nanometer integrated systems, electromigrations (EM) for interconnect and biased temperature instability (BTI) for CMOS devices. The authors discuss in detail recent developments in the modeling, analysis and optimization of the reliability effects from EM and BTI induced failures at the circuit, architecture and system levels of abstraction. Readers will benefit from a focus on topics such as recently developed, physics-based EM modeling, EM modeling for multi-segment wires, new EM-aware power grid analysis, and system level EM-induced reliability optimization and management techniques. Reviews classic Electromigration (EM) models, as well as existing EM failure models and discusses the limitations of those models; Introduces a dynamic EM model to address transient stress evolution, in which wires are stressed under time-varying current flows, and the EM recovery effects. Also includes new, parameterized equivalent DC current based EM models to address the recovery and transient effects; Presents a cross-layer approach to transistor aging modeling, analysis and mitigation, spanning multiple abstraction levels; Equips readers for EM-induced dynamic reliability management and energy or lifetime optimization techniques, for many-core dark silicon microprocessors, embedded systems, lower power many-core processors and datacenters
    Additional Edition: ISBN 9783030261719
    Additional Edition: Erscheint auch als Druck-Ausgabe ISBN 978-3-030-26171-9
    Additional Edition: Erscheint auch als Druck-Ausgabe Tan, Sheldon Long-term reliability of nanometer VLSI systems Cham : Springer, 2019 ISBN 3030261719
    Additional Edition: ISBN 9783030261719
    Additional Edition: ISBN 9783030261740
    Language: English
    Subjects: Engineering
    RVK:
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  • 5
    UID:
    kobvindex_ZLB15488252
    Format: XXIX, 305 Seiten
    ISBN: 9781461407874
    Language: English
    Keywords: VLSI ; Nanometerbereich
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  • 6
    UID:
    b3kat_BV042012588
    Format: 1 Online-Ressource
    ISBN: 9781493911035
    Additional Edition: Erscheint auch als Druckausgabe ISBN 978-1-4939-1102-8
    Language: English
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  • 7
    UID:
    b3kat_BV040124707
    Format: 1 Online-Ressource
    ISBN: 9781461407881
    Language: English
    Keywords: Nanoelektronik ; Statistik ; VLSI
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  • 8
    Online Resource
    Online Resource
    IntechOpen | Rijeka, Croatia :InTech,
    UID:
    edoccha_9958123669602883
    Format: 1 online resource (xi, 304 pages) : , illustrations
    ISBN: 953-51-6092-3
    Content: This book provides some recent advances in design nanometer VLSI chips. The selected topics try to present some open problems and challenges with important topics ranging from design tools, new post-silicon devices, GPU-based parallel computing, emerging 3D integration, and antenna design. The book consists of two parts, with chapters such as: VLSI design for multi-sensor smart systems on a chip, Three-dimensional integrated circuits design for thousand-core processors, Parallel symbolic analysis of large analog circuits on GPU platforms, Algorithms for CAD tools VLSI design, A multilevel memetic algorithm for large SAT-encoded problems, etc.
    Note: English
    Additional Edition: ISBN 953-307-884-7
    Language: English
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  • 9
    Online Resource
    Online Resource
    IntechOpen | Rijeka, Croatia :InTech,
    UID:
    edocfu_9958123669602883
    Format: 1 online resource (xi, 304 pages) : , illustrations
    ISBN: 953-51-6092-3
    Content: This book provides some recent advances in design nanometer VLSI chips. The selected topics try to present some open problems and challenges with important topics ranging from design tools, new post-silicon devices, GPU-based parallel computing, emerging 3D integration, and antenna design. The book consists of two parts, with chapters such as: VLSI design for multi-sensor smart systems on a chip, Three-dimensional integrated circuits design for thousand-core processors, Parallel symbolic analysis of large analog circuits on GPU platforms, Algorithms for CAD tools VLSI design, A multilevel memetic algorithm for large SAT-encoded problems, etc.
    Note: English
    Additional Edition: ISBN 953-307-884-7
    Language: English
    Library Location Call Number Volume/Issue/Year Availability
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  • 10
    Online Resource
    Online Resource
    IntechOpen | Rijeka, Croatia :InTech,
    UID:
    almahu_9949282091502882
    Format: 1 online resource (xi, 304 pages) : , illustrations
    ISBN: 953-51-6092-3
    Content: This book provides some recent advances in design nanometer VLSI chips. The selected topics try to present some open problems and challenges with important topics ranging from design tools, new post-silicon devices, GPU-based parallel computing, emerging 3D integration, and antenna design. The book consists of two parts, with chapters such as: VLSI design for multi-sensor smart systems on a chip, Three-dimensional integrated circuits design for thousand-core processors, Parallel symbolic analysis of large analog circuits on GPU platforms, Algorithms for CAD tools VLSI design, A multilevel memetic algorithm for large SAT-encoded problems, etc.
    Note: English
    Additional Edition: ISBN 953-307-884-7
    Language: English
    Library Location Call Number Volume/Issue/Year Availability
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