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  • 1
    Online Resource
    Online Resource
    Applied reconfigurable computing : 13th International Symposium, ARC 2017, Delft, The Netherlands, April 3-7, 2017 : proceedings (2017)
    [Cham] :Springer,
    Details
    UID:
    almafu_BV044257209
    Format: 1 Online-Ressource XX, 332 Seiten : , Illustrationen, Diagramme.
    ISBN: 978-3-319-56258-2
    Series Statement: Lecture Notes in Computer Science Volume 10216
    Additional Edition: Erscheint auch als Druck-Ausgabe ISBN 978-3-319-56257-5
    Language: English
    Subjects: Computer Science
    RVK:
    SS 4800
    Keywords: Rekonfiguration ; Computerarchitektur ; Field programmable gate array ; Konferenzschrift ; Konferenzschrift
    DOI: 10.1007/978-3-319-56258-2
    URL: Volltext  (URL des Erstveröffentlichers)
    URL: Volltext  (URL des Erstveröffentlichers)
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  • 2
    Book
    Book
    Applied reconfigurable computing : 13th international symposium, ARC 2017, Delft, The Netherlands, April 3-7, 2017: proceedings (2017)
    [Cham] : Springer
    Details
    UID:
    b3kat_BV044915303
    Format: XX, 332 Seiten , Illustrationen, Diagramme
    ISBN: 9783319562575
    Series Statement: Lecture notes in computer science 10216
    Additional Edition: Erscheint auch als Online-Ausgabe ISBN 978-3-319-56258-2
    Language: English
    Subjects: Computer Science
    RVK:
    SS 4800
    Keywords: Rekonfiguration ; Computerarchitektur ; Field programmable gate array ; Konferenzschrift
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  • 3
    Online Resource
    Online Resource
    Applied Reconfigurable Computing : 13th International Symposium, ARC 2017, Delft, The Netherlands, April 3-7, 2017, Proceedings (2017)
    Cham :Springer International Publishing :
    Details
    UID:
    almahu_9947376903002882
    Format: XX, 332 p. 142 illus. , online resource.
    ISBN: 9783319562582
    Series Statement: Lecture Notes in Computer Science, 10216
    Content: This book constitutes the refereed proceedings of the 13th International Symposium on Applied Reconfigurable Computing, ARC 2017, held in Delft, The Netherlands, in April 2017. The 17 full papers and 11 short papers presented in this volume were carefully reviewed and selected from 49 submissions. They are organized in topical sections on adaptive architectures, embedded computing and security, simulation and synthesis, design space exploration, fault tolerance, FGPA-based designs, neural neworks, and languages and estimation techniques.
    In: Springer eBooks
    Additional Edition: Printed edition: ISBN 9783319562575
    Language: English
    DOI: 10.1007/978-3-319-56258-2
    URL: http://dx.doi.org/10.1007/978-3-319-56258-2
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  • 4
    Online Resource
    Online Resource
    Embedded Computer Systems: Architectures, Modeling, and Simulation : 9th International Workshop, SAMOS 2009, Samos, Greece, July 20-23, 2009. Proceedings (2009)
    Berlin, Heidelberg :Springer Berlin Heidelberg,
    Details
    UID:
    almahu_9947364156202882
    Format: XIV, 342 p. , online resource.
    ISBN: 9783642031380
    Series Statement: Lecture Notes in Computer Science, 5657
    Content: This book constitutes the refereed proceedings of the 9th International Workshop on Architectures, Modeling, and Simulation, SAMOS 2009, held on Samos, Greece, on July 20-23, 2009. The 18 regular papers presented were carefully reviewed and selected from 52 submissions. The papers are organized in topical sections on architectures for multimedia, multi/many cores architectures, VLSI architectures design, architecture modeling and exploration tools. In addition there are 14 papers from three special sessions which were organized on topics of current interest: instruction-set customization, reconfigurable computing and processor architectures, and mastering cell BE and GPU execution platforms.
    Note: Beachnote -- What Else Is Broken? Can We Fix It? -- Architectures for Multimedia -- Programmable and Scalable Architecture for Graphics Processing Units -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey -- Programmable Accelerators for Reconfigurable Video Decoder -- Scenario Based Mapping of Dynamic Applications on MPSoC: A 3D Graphics Case Study -- Multiple Description Scalable Coding for Video Transmission over Unreliable Networks -- Multi/Many Cores Architectures -- Evaluation of Different Multithreaded and Multicore Processor Configurations for SoPC -- Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture -- Implementation of W-CDMA Cell Search on a FPGA Based Multi-Processor System-on-Chip with Power Management -- A Multiprocessor Architecture with an Omega Network for the Massively Parallel Model GCA -- VLSI Architectures Design -- Towards Automated FSMD Partitioning for Low Power Using Simulated Annealing -- Radix-4 Recoded Multiplier on Quantum-Dot Cellular Automata -- Prediction in Dynamic SDRAM Controller Policies -- Inversion/Non-inversion Implementation for an 11,424 Gate-Count Dynamic Optically Reconfigurable Gate Array VLSI -- Architecture Modeling and Exploration Tools -- Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration -- Modeling Scalable SIMD DSPs in LISA -- NoGAP: A Micro Architecture Construction Framework -- A Comparison of NoTA and GENESYS -- Special Session 1: Instruction-Set Customization -- to Instruction-Set Customization -- Constraint-Driven Identification of Application Specific Instructions in the DURASE System -- A Generic Design Flow for Application Specific Processor Customization through Instruction-Set Extensions (ISEs) -- Runtime Adaptive Extensible Embedded Processors — A Survey -- Special Session 2: The Future of Reconfigurable Computing and Processor Architectures -- to the Future of Reconfigurable Computing and Processor Architectures -- An Embrace-and-Extend Approach to Managing the Complexity of Future Heterogeneous Systems -- Applying the Stream-Based Computing Model to Design Hardware Accelerators: A Case Study -- Reconfigurable Multicore Server Processors for Low Power Operation -- Reconfigurable Computing in the New Age of Parallelism -- Reconfigurable Multithreading Architectures: A Survey -- Special Session 3: Mastering Cell BE and GPU Execution Platforms -- to Mastering Cell BE and GPU Execution Platforms -- Efficient Mapping of Multiresolution Image Filtering Algorithms on Graphics Processors -- Implementing Blocked Sparse Matrix-Vector Multiplication on NVIDIA GPUs -- Experiences with Cell-BE and GPU for Tomography -- Realizing FIFO Communication When Mapping Kahn Process Networks onto the Cell -- Exploiting Locality on the Cell/B.E. through Bypassing -- Exploiting the Cell/BE Architecture with the StarPU Unified Runtime System.
    In: Springer eBooks
    Additional Edition: Printed edition: ISBN 9783642031373
    Language: English
    DOI: 10.1007/978-3-642-03138-0
    URL: http://dx.doi.org/10.1007/978-3-642-03138-0
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  • 5
    Online Resource
    Online Resource
    Architecture of Computing Systems – ARCS 2009 : 22nd International Conference, Delft, The Netherlands, March 10-13, 2009. Proceedings (2009)
    Berlin, Heidelberg :Springer Berlin Heidelberg,
    Details
    UID:
    almahu_9947364168502882
    Format: XIII, 259 p. , online resource.
    ISBN: 9783642004544
    Series Statement: Lecture Notes in Computer Science, 5455
    Content: This book constitutes the refereed proceedings of the 22nd International Conference on Architecture of Computing Systems, ARCS 2009, held in Delft, The Netherlands, in March 2009. The 21 revised full papers presented together with 3 keynote papers were carefully reviewed and selected from 57 submissions. This year's special focus is set on energy awareness. The papers are organized in topical sections on compilation technologies, reconfigurable hardware and applications, massive parallel architectures, organic computing, memory architectures, enery awareness, Java processing, and chip-level multiprocessing.
    Note: Keynotes -- Life on the Treadmill -- Key Microarchitectural Innovations for Future Microprocessors -- The Challenges of Multicore: Information and Mis-Information -- Compilation Technologies -- Extracting Coarse-Grained Pipelined Parallelism Out of Sequential Applications for Parallel Processor Arrays -- Parallelization Approaches for Hardware Accelerators – Loop Unrolling Versus Loop Partitioning -- Evaluating Sampling Based Hotspot Detection -- Reconfigurable Hardware and Applications -- A Reconfigurable Bloom Filter Architecture for BLASTN -- SoCWire: A Robust and Fault Tolerant Network-on-Chip Approach for a Dynamic Reconfigurable System-on-Chip in FPGAs -- A Light-Weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures -- Ultra-Fast Downloading of Partial Bitstreams through Ethernet -- Massive Parallel Architectures -- SCOPE - Sensor Mote Configuration and Operation Enhancement -- Generated Horizontal and Vertical Data Parallel GCA Machines for the N-Body Force Calculation -- Hybrid Resource Discovery Mechanism in Ad Hoc Grid Using Structured Overlay -- Organic Computing -- Marketplace-Oriented Behavior in Semantic Multi-Criteria Decision Making Autonomous Systems -- Self-organized Parallel Cooperation for Solving Optimization Problems -- Memory Architectures -- Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture -- An Enhanced DMA Controller in SIMD Processors for Video Applications -- Cache Controller Design on Ultra Low Leakage Embedded Processors -- Energy Awareness -- Autonomous DVFS on Supply Islands for Energy-Constrained NoC Communication -- Energy Management System as an Embedded Service: Saving Energy Consumption of ICT -- Java Processing -- A Garbage Collection Technique for Embedded Multithreaded Multicore Processors -- Empirical Performance Models for Java Workloads -- Chip-Level Multiprocessing -- Performance Matching of Hardware Acceleration Engines for Heterogeneous MPSoC Using Modular Performance Analysis -- Evaluating CMPs and Their Memory Architecture.
    In: Springer eBooks
    Additional Edition: Printed edition: ISBN 9783642004537
    Language: English
    DOI: 10.1007/978-3-642-00454-4
    URL: http://dx.doi.org/10.1007/978-3-642-00454-4
    Library Location Call Number Volume/Issue/Year Availability
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  • 6
    Online Resource
    Online Resource
    Applied reconfigurable computing : 13th International Symposium, ARC 2017, Delft, The Netherlands, April 3-7, 2017 : proceedings (2017)
    [Cham] :Springer,
    Details
    UID:
    edocfu_BV044257209
    Format: 1 Online-Ressource XX, 332 Seiten : , Illustrationen, Diagramme.
    ISBN: 978-3-319-56258-2
    Series Statement: Lecture Notes in Computer Science Volume 10216
    Additional Edition: Erscheint auch als Druck-Ausgabe ISBN 978-3-319-56257-5
    Language: English
    Subjects: Computer Science
    RVK:
    SS 4800
    Keywords: Rekonfiguration ; Computerarchitektur ; Field programmable gate array ; Konferenzschrift
    DOI: 10.1007/978-3-319-56258-2
    URL: Volltext  (URL des Erstveröffentlichers)
    Library Location Call Number Volume/Issue/Year Availability
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    Online Resource
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  • 7
    Online Resource
    Online Resource
    Architecture of Computing Systems – ARCS 2009 : 22nd International Conference, Delft, The Netherlands, March 10-13, 2009. Proceedings (2009)
    Berlin, Heidelberg : Springer Berlin Heidelberg
    Details
    UID:
    gbv_1647744164
    Format: Online-Ressource (digital)
    ISBN: 9783642004544
    Series Statement: Lecture Notes in Computer Science 5455
    Content: Keynotes -- Life on the Treadmill -- Key Microarchitectural Innovations for Future Microprocessors -- The Challenges of Multicore: Information and Mis-Information -- Compilation Technologies -- Extracting Coarse-Grained Pipelined Parallelism Out of Sequential Applications for Parallel Processor Arrays -- Parallelization Approaches for Hardware Accelerators – Loop Unrolling Versus Loop Partitioning -- Evaluating Sampling Based Hotspot Detection -- Reconfigurable Hardware and Applications -- A Reconfigurable Bloom Filter Architecture for BLASTN -- SoCWire: A Robust and Fault Tolerant Network-on-Chip Approach for a Dynamic Reconfigurable System-on-Chip in FPGAs -- A Light-Weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures -- Ultra-Fast Downloading of Partial Bitstreams through Ethernet -- Massive Parallel Architectures -- SCOPE - Sensor Mote Configuration and Operation Enhancement -- Generated Horizontal and Vertical Data Parallel GCA Machines for the N-Body Force Calculation -- Hybrid Resource Discovery Mechanism in Ad Hoc Grid Using Structured Overlay -- Organic Computing -- Marketplace-Oriented Behavior in Semantic Multi-Criteria Decision Making Autonomous Systems -- Self-organized Parallel Cooperation for Solving Optimization Problems -- Memory Architectures -- Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture -- An Enhanced DMA Controller in SIMD Processors for Video Applications -- Cache Controller Design on Ultra Low Leakage Embedded Processors -- Energy Awareness -- Autonomous DVFS on Supply Islands for Energy-Constrained NoC Communication -- Energy Management System as an Embedded Service: Saving Energy Consumption of ICT -- Java Processing -- A Garbage Collection Technique for Embedded Multithreaded Multicore Processors -- Empirical Performance Models for Java Workloads -- Chip-Level Multiprocessing -- Performance Matching of Hardware Acceleration Engines for Heterogeneous MPSoC Using Modular Performance Analysis -- Evaluating CMPs and Their Memory Architecture.
    Content: This book constitutes the refereed proceedings of the 22nd International Conference on Architecture of Computing Systems, ARCS 2009, held in Delft, The Netherlands, in March 2009. The 21 revised full papers presented together with 3 keynote papers were carefully reviewed and selected from 57 submissions. This year's special focus is set on energy awareness. The papers are organized in topical sections on compilation technologies, reconfigurable hardware and applications, massive parallel architectures, organic computing, memory architectures, enery awareness, Java processing, and chip-level multiprocessing.
    Note: Literaturangaben
    Additional Edition: ISBN 9783642004537
    Additional Edition: Erscheint auch als Druck-Ausgabe Architecture of computing systems - ARCS 2009 22nd international conference, Delft, The Netherlands, March 10-13, 2009
    Additional Edition: Buchausg. u.d.T. Architecture of computing systems - ARCS 2009 Berlin : Springer, 2009 ISBN 3642004539
    Additional Edition: ISBN 9783642004537
    Language: English
    Subjects: Computer Science
    RVK:
    SS 4800
    Keywords: Autonomic Computing ; Computerarchitektur ; Computerarchitektur ; Rekonfiguration ; Computerarchitektur ; Massive Parallelität ; Computerarchitektur ; Speicher ; Verteiltes System ; Selbst organisierendes System ; Parallelverarbeitung ; Computerarchitektur ; Autonomic Computing ; Computerarchitektur ; Computerarchitektur ; Rekonfiguration ; Computerarchitektur ; Massive Parallelität ; Computerarchitektur ; Speicher ; Verteiltes System ; Selbst organisierendes System ; Parallelverarbeitung ; Computerarchitektur ; Konferenzschrift ; Konferenzschrift
    DOI: 10.1007/978-3-642-00454-4
    URL: Volltext  (lizenzpflichtig)
    URL: Volltext  (lizenzpflichtig)
    URL: Volltext  (lizenzpflichtig)
    URL: Volltext  (lizenzpflichtig)
    URL: Cover
    Author information: Bereković, Mladen 1967-
    Author information: Pandu Rangan, C. 1955-
    Author information: Mattern, Friedemann 1955-
    Author information: Müller-Schloer, Christian 1950-
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    UB Potsdam
  • 8
    Online Resource
    Online Resource
    Embedded Computer Systems: Architectures, Modeling, and Simulation : 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008. Proceedings (2008)
    Berlin, Heidelberg : Springer Berlin Heidelberg
    Details
    UID:
    gbv_1647258871
    Format: Online-Ressource (digital)
    ISBN: 9783540705505
    Series Statement: Lecture Notes in Computer Science 5114
    Content: Beachnote -- Can They Be Fixed: Some Thoughts After 40 Years in the Business -- Architecture -- On the Benefit of Caching Traffic Flow Data in the Link Buffer -- Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic -- Scalable Architecture for Prefix Preserving Anonymization of IP Addresses -- New Frontiers -- Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology -- Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications -- 802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec -- SoC -- A Real-Time Programming Model for Heterogeneous MPSoCs -- A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation -- A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs -- Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors -- Application Specific -- Area Reliability Trade-Off in Improved Reed Muller Coding -- Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set -- ASIP-eFPGA Architecture for Multioperable GNSS Receivers -- Special Session: System Level Design for Heterogeneous Systems -- to System Level Design for Heterogeneous Systems -- Streaming Systems in FPGAs -- Heterogeneous Design in Functional DIF -- Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study -- Evaluation of ASIPs Design with LISATek -- High Level Loop Transformations for Systematic Signal Processing Embedded Applications -- Memory-Centric Hardware Synthesis from Dataflow Models -- Special Session: Programming Multicores -- to Programming Multicores -- Design Issues in Parallel Array Languages for Shared Memory -- An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency -- Sensors and Sensor Networks -- Climate and Biological Sensor Network -- Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors -- Application Server for Wireless Sensor Networks -- Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks -- System Modeling and Design -- Signature-Based Calibration of Analytical System-Level Performance Models -- System-Level Design Space Exploration of Dynamic Reconfigurable Architectures -- Intellectual Property Protection for Embedded Sensor Nodes.
    Content: This book constitutes the refereed proceedings of the 8th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2008, held in Samos, Greece, in July 2008. The 24 revised full papers presented together with a contamplative keynote and additional papers of two special workshop sessions were carefully reviewed and selected from 62 submissions. The papers are organized in topical sections on architecture, new frontiers, SoC, application specific contributions, system level design for heterogeneous systems, programming multicores, sensors and sensor networks; and systems modeling and design.
    Additional Edition: ISBN 9783540705499
    Additional Edition: Buchausg. u.d.T. Embedded computer systems: architectures, modeling, and simulation Berlin : Springer, 2008 ISBN 354070549X
    Additional Edition: ISBN 9783540705499
    Language: English
    Subjects: Computer Science
    RVK:
    SS 4800
    Keywords: Eingebettetes System ; Computerarchitektur ; Eingebettetes System ; Rekonfiguration ; Eingebettetes System ; Softwareentwicklung ; Hardwareentwurf ; Konferenzschrift
    DOI: 10.1007/978-3-540-70550-5
    URL: Volltext  (lizenzpflichtig)
    URL: Cover
    Author information: Bereković, Mladen 1967-
    Author information: Nierstrasz, Oscar 1957-
    Author information: Pandu Rangan, C. 1955-
    Author information: Mattern, Friedemann 1955-
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  • 9
    Online Resource
    Online Resource
    Applied Reconfigurable Computing : 13th International Symposium, ARC 2017, Delft, The Netherlands, April 3-7, 2017, Proceedings (2017)
    Cham : Springer
    Details
    UID:
    gbv_1657556352
    Format: Online-Ressource (XX, 332 p. 142 illus, online resource)
    ISBN: 9783319562582
    Series Statement: Lecture Notes in Computer Science 10216
    Content: This book constitutes the refereed proceedings of the 13th International Symposium on Applied Reconfigurable Computing, ARC 2017, held in Delft, The Netherlands, in April 2017. The 17 full papers and 11 short papers presented in this volume were carefully reviewed and selected from 49 submissions. They are organized in topical sections on adaptive architectures, embedded computing and security, simulation and synthesis, design space exploration, fault tolerance, FGPA-based designs, neural neworks, and languages and estimation techniques
    Additional Edition: ISBN 9783319562575
    Additional Edition: Erscheint auch als Druck-Ausgabe ISBN 978-3-319-56257-5
    Additional Edition: Printed edition ISBN 9783319562575
    Language: English
    Keywords: Rekonfiguration ; Computerarchitektur ; Field programmable gate array
    DOI: 10.1007/978-3-319-56258-2
    URL: Volltext  (lizenzpflichtig)
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  • 10
    Online Resource
    Online Resource
    Embedded Computer Systems: Architectures, Modeling, and Simulation : 8th International Workshop, SAMOS 2008, Samos, Greece, July 21-24, 2008. Proceedings (2008)
    Berlin, Heidelberg :Springer Berlin Heidelberg,
    Details
    UID:
    almahu_9947364043802882
    Format: XVI, 300 p. , online resource.
    ISBN: 9783540705505
    Series Statement: Lecture Notes in Computer Science, 5114
    Content: This book constitutes the refereed proceedings of the 8th International Workshop on Systems, Architectures, Modeling, and Simulation, SAMOS 2008, held in Samos, Greece, in July 2008. The 24 revised full papers presented together with a contamplative keynote and additional papers of two special workshop sessions were carefully reviewed and selected from 62 submissions. The papers are organized in topical sections on architecture, new frontiers, SoC, application specific contributions, system level design for heterogeneous systems, programming multicores, sensors and sensor networks; and systems modeling and design.
    Note: Beachnote -- Can They Be Fixed: Some Thoughts After 40 Years in the Business -- Architecture -- On the Benefit of Caching Traffic Flow Data in the Link Buffer -- Energy-Efficient Simultaneous Thread Fetch from Different Cache Levels in a Soft Real-Time SMT Processor -- Impact of Software Bypassing on Instruction Level Parallelism and Register File Traffic -- Scalable Architecture for Prefix Preserving Anonymization of IP Addresses -- New Frontiers -- Arithmetic Design on Quantum-Dot Cellular Automata Nanotechnology -- Preliminary Analysis of the Cell BE Processor Limitations for Sequence Alignment Applications -- 802.15.3 Transmitter: A Fast Design Cycle Using OFDM Framework in Bluespec -- SoC -- A Real-Time Programming Model for Heterogeneous MPSoCs -- A Multi-objective and Hierarchical Exploration Tool for SoC Performance Estimation -- A Novel Non-exclusive Dual-Mode Architecture for MPSoCs-Oriented Network on Chip Designs -- Energy and Performance Evaluation of an FPGA-Based SoC Platform with AES and PRESENT Coprocessors -- Application Specific -- Area Reliability Trade-Off in Improved Reed Muller Coding -- Efficient Reed-Solomon Iterative Decoder Using Galois Field Instruction Set -- ASIP-eFPGA Architecture for Multioperable GNSS Receivers -- Special Session: System Level Design for Heterogeneous Systems -- to System Level Design for Heterogeneous Systems -- Streaming Systems in FPGAs -- Heterogeneous Design in Functional DIF -- Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study -- Evaluation of ASIPs Design with LISATek -- High Level Loop Transformations for Systematic Signal Processing Embedded Applications -- Memory-Centric Hardware Synthesis from Dataflow Models -- Special Session: Programming Multicores -- to Programming Multicores -- Design Issues in Parallel Array Languages for Shared Memory -- An Architecture and Protocol for the Management of Resources in Ubiquitous and Heterogeneous Systems Based on the SVP Model of Concurrency -- Sensors and Sensor Networks -- Climate and Biological Sensor Network -- Monitoring of Environmentally Hazardous Exhaust Emissions from Cars Using Optical Fibre Sensors -- Application Server for Wireless Sensor Networks -- Embedded Software Architecture for Diagnosing Network and Node Failures in Wireless Sensor Networks -- System Modeling and Design -- Signature-Based Calibration of Analytical System-Level Performance Models -- System-Level Design Space Exploration of Dynamic Reconfigurable Architectures -- Intellectual Property Protection for Embedded Sensor Nodes.
    In: Springer eBooks
    Additional Edition: Printed edition: ISBN 9783540705499
    Language: English
    DOI: 10.1007/978-3-540-70550-5
    URL: http://dx.doi.org/10.1007/978-3-540-70550-5
    Library Location Call Number Volume/Issue/Year Availability
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