Format:
1 Online-Ressource (xiii, 113 Seiten)
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Illustrationen
Edition:
Also available in print
ISBN:
1627057668
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9781627057660
Series Statement:
Synthesis lectures on computer architecture #31
Content:
The emerging three-dimensional (3D) chip architectures, with their intrinsic capability of reducing the wire length, promise attractive solutions to reduce the delay of interconnects in future microprocessors. 3D memory stacking enables much higher memory bandwidth for future chip-multiprocessor design, mitigating the "memory wall" problem. In addition, heterogenous integration enabled by 3D technology can also result in innovative designs for future microprocessors. This book first provides a brief introduction to this emerging technology, and then presents a variety of approaches to designing future 3D microprocessor systems, by leveraging the benefits of low latency, high bandwidth, and heterogeneous integration capability which are offered by 3D technology
Content:
1. 3D integration technology -- 1.1 3D integrated circuits vs. 3D packaging -- 1.2 Different process technologies for 3D ICs -- 1.3 The impact of 3D technology on 3D microprocessor partitioning --
Content:
2. Benefits of 3D integration -- 2.1 Wire length reduction -- 2.2 Memory bandwidth improvement -- 2.3 Heterogenous integration -- 2.4 Cost-effective architecture --
Content:
3. Fine-granularity 3D processor design -- 3.1 3D cache partitioning -- 3.1.1 3D cache partitioning strategies -- 3.1.2 Design exploration using 3DCacti -- 3.2 3D Partitioning for logic blocks --
Content:
4. Coarse-granularity 3D processor design -- 4.1 3D Caches stacking -- 4.2 3D Main memory stacking -- 4.3 3D On-chip stacked memory: cache or main memory? -- 4.3.1 On-chip main memory -- 4.3.2 3D-stacked LLC -- 4.3.3 Dynamic approach -- 4.4 PicoServer --
Content:
5. 3D GPU architecture -- 5.1 3D-stacked GPU memory -- 5.2 3D-stacked GPU processor --
Content:
6. 3D network-on-chip -- 6.1 3D NoC router design -- 6.2 3D NoC topology design -- 6.3 3D optical NoC design -- 6.4 Impact of 3D technology on NoC designs --
Content:
7. Thermal analysis and thermal-aware design -- 7.1 Thermal analysis -- 7.2 Thermal-aware floorplanning for 3D processors -- 7.3 Thermal-herding: thermal-aware architecture design --
Content:
8. Cost analysis for 3D ICs -- 8.1 3D cost model -- 8.2 Cost evaluation for many-core microprocessor designs -- 8.2.1 Cost evaluation with homogeneous partitioning -- 8.2.2 Cost evaluation with heterogeneous partitioning --
Content:
9. Conclusion -- Bibliography -- Authors' biographies
Note:
Includes bibliographical references (pages 99-111)
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1. 3D integration technology1.1 3D integrated circuits vs. 3D packaging -- 1.2 Different process technologies for 3D ICs -- 1.3 The impact of 3D technology on 3D microprocessor partitioning -- 2. Benefits of 3D integration -- 2.1 Wire length reduction -- 2.2 Memory bandwidth improvement -- 2.3 Heterogenous integration -- 2.4 Cost-effective architecture -- 3. Fine-granularity 3D processor design -- 3.1 3D cache partitioning -- 3.1.1 3D cache partitioning strategies -- 3.1.2 Design exploration using 3DCacti -- 3.2 3D Partitioning for logic blocks.
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4. Coarse-granularity 3D processor design4.1 3D Caches stacking -- 4.2 3D Main memory stacking -- 4.3 3D On-chip stacked memory: cache or main memory? -- 4.3.1 On-chip main memory -- 4.3.2 3D-stacked LLC -- 4.3.3 Dynamic approach -- 4.4 PicoServer -- 5. 3D GPU architecture -- 5.1 3D-stacked GPU memory -- 5.2 3D-stacked GPU processor.
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6. 3D network-on-chip6.1 3D NoC router design -- 6.2 3D NoC topology design -- 6.3 3D optical NoC design -- 6.4 Impact of 3D technology on NoC designs -- 7. Thermal analysis and thermal-aware design -- 7.1 Thermal analysis -- 7.2 Thermal-aware floorplanning for 3D processors -- 7.3 Thermal-herding: thermal-aware architecture design.
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8. Cost analysis for 3D ICs8.1 3D cost model -- 8.2 Cost evaluation for many-core microprocessor designs -- 8.2.1 Cost evaluation with homogeneous partitioning -- 8.2.2 Cost evaluation with heterogeneous partitioning -- 9. Conclusion -- Bibliography -- Authors' biographies.
,
Also available in print.
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System requirements: Adobe Acrobat Reader.
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Mode of access: World Wide Web.
Additional Edition:
ISBN 162705765X
Additional Edition:
ISBN 9781627057653
Language:
English
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