Format:
1 Online-Ressource (xiii, 324 pages)
,
illustrations
Edition:
[S.l.] HathiTrust Digital Library Electronic reproduction
ISBN:
0769500048
,
9780769500041
Content:
Annotation, Contains 37 technical papers and overviews of five workshops, but none of the keynote addresses nor summaries of the panel sessions. Considers performance enhancement, simultaneous multi-threading, memory systems, instruction scheduling and speculation, cache coherence, SMP clusters, cache and input/output systems, communications issues, and shared memory. The workshops explore computer education, applications for network-based parallel computing, multi-thread execution architecture and compilation, parallel computing for irregular applications, and evaluating computer architecture using commercial workloads. No subject index. Annotation copyrighted by Book News, Inc., Portland, OR
Note:
Includes bibliographical references and index
,
Use copy Restrictions unspecified star MiAaHDL
,
Electronic reproduction
,
Master and use copy. Digital master created according to Benchmark for Faithful Digital Reproductions of Monographs and Serials, Version 1. Digital Library Federation, December 2002.
Additional Edition:
Print version International Symposium on High-Performance Computer Architecture (5th : 1999 : Orlando, Fla.) Proceedings Los Alamitos, CA : IEEE Computer Society Press, ©1999
Language:
English
Keywords:
Konferenzschrift
URL:
http://purl.oclc.org/DLF/benchrepro0212
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