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  • 1
    Online Resource
    Online Resource
    [San Rafael, Calif.] : Morgan & Claypool
    UID:
    gbv_1659482887
    Format: XIV, 247 S.
    Edition: 2. ed.
    Edition: Online-Ausg. Online-Ressource Synthesis digital library of engineering and computer science
    Edition: Computer & information science. collection two
    ISBN: 9781608452354
    Series Statement: Synthesis lectures on computer architecture 11
    Additional Edition: ISBN 9781608452361
    Additional Edition: Erscheint auch als Druck-Ausgabe Harris, Tim Transactional memory [San Rafael, Calif.] : Morgan & Claypool, 2010 ISBN 9781608452354
    Additional Edition: ISBN 1608452352
    Language: English
    Subjects: Computer Science
    RVK:
    Keywords: Transaktionssystem ; Gemeinsamer Speicher ; Robustheit
    Library Location Call Number Volume/Issue/Year Availability
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  • 2
    Online Resource
    Online Resource
    [San Rafael] : Morgan & Claypool Publishers
    UID:
    gbv_715260022
    Format: 1 Online-Ressource (263 Seiten)
    Edition: 2nd edition
    Edition: Electronic reproduction Available via World Wide Web
    ISBN: 9781608452361
    Series Statement: Synthesis lectures in computer architecture #11
    Content: Includes bibliographical references
    Content: 1. Introduction -- Motivation -- Difficulty of Parallel Programming -- Parallel Programming Abstractions -- Database Systems and Transactions -- What Is a Transaction -- Transactional Memory -- Basic Transactional Memory -- Building on Basic Transactions -- Software Transactional Memory -- Hardware Transactional Memory -- What is Transactional Memory Good For -- Differences Between Database Transactions and TM -- Current Transactional Memory Systems and Simulators --
    Content: 2. Basic Transactions -- TM Design Choices -- Concurrency Control -- Version Management -- Conflict Detection -- Semantics of Transactions -- Correctness Criteria for Database Transactions -- Consistency During Transactions -- Problems with Mixed-Mode Accesses -- Handling Mixed-Mode Accesses: Lock-Based Models -- Handling Mixed-Mode Accesses: TSC -- Nesting -- Performance, Progress and Pathologies -- Progress Guarantees -- Conflict Detection and Performance -- Contention Management and Scheduling -- Reducing Conflicts Between Transactions -- Higher-Level Conflict Detection -- Summary --
    Content: 3. Building on Basic Transactions -- Basic Atomic Blocks -- Semantics of Basic Atomic Blocks -- Building Basic Atomic Blocks Over TM -- Providing Strong Guarantees Over Weak TM Systems -- Extending Basic Atomic Blocks -- Condition Synchronization -- Exceptions and Failure Atomicity -- Integrating Non-TM Resources -- Binary Libraries -- Storage Allocation and GC -- Existing Synchronization Primitives -- System Calls, IO, and External Transactions -- Programming with TM -- Debugging and Profiling -- TM Workloads -- User Studies -- Alternative Models -- Transactions Everywhere -- Lock-Based Models over TM -- Speculation over TM -- Summary --
    Content: 4. Software Transactional Memory -- Managing STM Logs and Metadata -- Maintaining Metadata -- Undo-Logs and Redo-Logs -- Read-Sets and Write-Sets -- Lock-Based STM Systems with Local Version Numbers -- Two-Phase Locking with Versioned Locks -- Optimizing STM Usage -- Providing Opacity -- Discussion -- Lock-Based STM Systems with a Global Clock -- Providing Opacity Using a Global Clock -- Timebase Extension -- Clock Contention vs False Conflict Tradeoffs -- Alternative Global Clock Algorithms -- Lock-Based STM Systems with Global Metadata -- Bloom Filter Conflict Detection -- Value-Based Validation -- Nonblocking STM Systems -- Per-object Indirection -- Nonblocking Object-Based STM Design Space -- Nonblocking STM Systems Without Indirection -- Additional Implementation Techniques -- Supporting Privatization Safety and Publication Safety -- Condition Synchronization -- Irrevocability -- Distributed STM Systems -- STM for Clusters -- STM-Based Middleware -- STM for PGAS Languages -- STM Testing and Correctness -- Summary --
    Content: 5. Hardware-Supported Transactional Memory -- Basic Mechanisms for Conventional HTMs -- Identifying Transactional Locations -- Tracking Read-Sets and Managing Write-Sets -- Detecting Data Conflicts -- Resolving Data Conflicts -- Managing Architectural Register State -- Committing and Aborting HTM Transactions -- Conventional HTM Proposals -- Explicitly Transactional HTMs -- Implicitly Transactional HTM Systems -- Hybrid TMs: Integrating HTMs and STMs -- Software and Design Considerations -- Alternative Mechanisms for HTMs -- Software-Resident Logs for Version Management -- Signatures for Access Tracking -- Conflict Detection via Update Broadcasts -- Deferring Conflict Detection -- Unbounded HTMs -- Combining Signatures and Software-Resident Logs -- Using Persistent Meta-Data -- Using Page Table Extensions -- Exposing Hardware Mechanisms to STMs -- Accelerating Short Transactions and Filtering Redundant Reads -- Software Controlled Cache Coherence -- Exposed Signatures to STMs -- Exposing Metadata to STMs -- Extending HTM: Nesting, IO, and Synchronization -- Summary --
    Content: 6. Conclusions -- Bibliography -- Authors' Biographies
    Note: Abstract freely available; full-text restricted to subscribers or individual document purchasers , Includes bibliographical references (p. 209-244) , Part of: Synthesis digital library of engineering and computer science , 1. Introduction -- Motivation -- Difficulty of Parallel Programming -- Parallel Programming Abstractions -- Database Systems and Transactions -- What Is a Transaction -- Transactional Memory -- Basic Transactional Memory -- Building on Basic Transactions -- Software Transactional Memory -- Hardware Transactional Memory -- What is Transactional Memory Good For -- Differences Between Database Transactions and TM -- Current Transactional Memory Systems and Simulators , 2. Basic Transactions -- TM Design Choices -- Concurrency Control -- Version Management -- Conflict Detection -- Semantics of Transactions -- Correctness Criteria for Database Transactions -- Consistency During Transactions -- Problems with Mixed-Mode Accesses -- Handling Mixed-Mode Accesses: Lock-Based Models -- Handling Mixed-Mode Accesses: TSC -- Nesting -- Performance, Progress and Pathologies -- Progress Guarantees -- Conflict Detection and Performance -- Contention Management and Scheduling -- Reducing Conflicts Between Transactions -- Higher-Level Conflict Detection -- Summary , 6. Conclusions -- Bibliography -- Authors' Biographies. , 3. Building on Basic Transactions -- Basic Atomic Blocks -- Semantics of Basic Atomic Blocks -- Building Basic Atomic Blocks Over TM -- Providing Strong Guarantees Over Weak TM Systems -- Extending Basic Atomic Blocks -- Condition Synchronization -- Exceptions and Failure Atomicity -- Integrating Non-TM Resources -- Binary Libraries -- Storage Allocation and GC -- Existing Synchronization Primitives -- System Calls, IO, and External Transactions -- Programming with TM -- Debugging and Profiling -- TM Workloads -- User Studies -- Alternative Models -- Transactions Everywhere -- Lock-Based Models over TM -- Speculation over TM -- Summary , 4. Software Transactional Memory -- Managing STM Logs and Metadata -- Maintaining Metadata -- Undo-Logs and Redo-Logs -- Read-Sets and Write-Sets -- Lock-Based STM Systems with Local Version Numbers -- Two-Phase Locking with Versioned Locks -- Optimizing STM Usage -- Providing Opacity -- Discussion -- Lock-Based STM Systems with a Global Clock -- Providing Opacity Using a Global Clock -- Timebase Extension -- Clock Contention vs False Conflict Tradeoffs -- Alternative Global Clock Algorithms -- Lock-Based STM Systems with Global Metadata -- Bloom Filter Conflict Detection -- Value-Based Validation -- Nonblocking STM Systems -- Per-object Indirection -- Nonblocking Object-Based STM Design Space -- Nonblocking STM Systems Without Indirection -- Additional Implementation Techniques -- Supporting Privatization Safety and Publication Safety -- Condition Synchronization -- Irrevocability -- Distributed STM Systems -- STM for Clusters -- STM-Based Middleware -- STM for PGAS Languages -- STM Testing and Correctness -- Summary , 5. Hardware-Supported Transactional Memory -- Basic Mechanisms for Conventional HTMs -- Identifying Transactional Locations -- Tracking Read-Sets and Managing Write-Sets -- Detecting Data Conflicts -- Resolving Data Conflicts -- Managing Architectural Register State -- Committing and Aborting HTM Transactions -- Conventional HTM Proposals -- Explicitly Transactional HTMs -- Implicitly Transactional HTM Systems -- Hybrid TMs: Integrating HTMs and STMs -- Software and Design Considerations -- Alternative Mechanisms for HTMs -- Software-Resident Logs for Version Management -- Signatures for Access Tracking -- Conflict Detection via Update Broadcasts -- Deferring Conflict Detection -- Unbounded HTMs -- Combining Signatures and Software-Resident Logs -- Using Persistent Meta-Data -- Using Page Table Extensions -- Exposing Hardware Mechanisms to STMs -- Accelerating Short Transactions and Filtering Redundant Reads -- Software Controlled Cache Coherence -- Exposed Signatures to STMs -- Exposing Metadata to STMs -- Extending HTM: Nesting, IO, and Synchronization -- Summary , Electronic reproduction Available via World Wide Web , System requirements: Adobe Acrobat Reader. , Mode of access: World Wide Web.
    Additional Edition: ISBN 9781608452354
    Additional Edition: Erscheint auch als Druck-Ausgabe Transactional Memory, 2nd Edition
    Language: English
    Subjects: Computer Science
    RVK:
    Library Location Call Number Volume/Issue/Year Availability
    BibTip Others were also interested in ...
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