Kooperativer Bibliotheksverbund

UID:

Format: 1 Online-Ressource

ISBN: 9783030520175

Series Statement: Embedded systems

Additional Edition: Erscheint auch als Druck-Ausgabe ISBN 978-3-030-52016-8

Language: English

Keywords: Electronic books.

DOI: 10.1007/978-3-030-52017-5

URL: Volltext  (kostenfrei)

URL: Volltext  (kostenfrei)

URL: kostenfrei

URL: FULL  ((Currently Only Available on Campus))

URL: lizenzpflichtig

UID:

Format: 1 online resource (xiii, 608 pages) : , illustrations (chiefly color).

ISBN: 9783030520175 , 303052017X , 3030520161 , 9783030520168 , 9783030520182 , 3030520188 , 9783030520199 , 3030520196

Series Statement: Embedded systems,

Content: This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today's points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.

Note: Introduction -- Design of efficient, dependable SoCs based on cross-layer-reliability approach with emphasis on wireless communication as application and DRAM memories -- CRAU: Compositional System-Level Reliability Analysis in the Presence of Uncertainties -- Semantics-aware Soft Error Handling for Embedded Systems using Compiler-OS Interaction -- ARES: Self-Adaptive Coarse-Grained Reconfigurable Architectures as Reliability Enhancers in Embedded Systems -- Cross-Layer Techniques for Dependable Software Execution on Embedded Systems -- Ambrosia: Cross-layer Modeling and Mitigation of Aging Effects in Embedded Systems -- Cross-Layer Dependability for Embedded Hardware/Software Systems -- Fault-Tolerant Computing with Heterogeneous Hardware/Software Hardening Modes -- Robust Computing for Machine Learning-Based Systems -- Hardening embedded system software -- LIFT: Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach -- VirTherm-3D: Communication Virtualization Enabling System Management for Dependable 3D MPSoCs -- OTERA: Online Test Strategies for Reliable Reconfigurable Architectures -- Variability-Aware Software: Recent Results and Contributions -- EM Lifetime Constrained Optimization for Multi-Segment Power Grid Networks -- Lightweight Software-Assisted Memory Error Correction -- Reliability-Driven Resource Management for Multi-Core Systems-on-Chip -- Monitor Circuits for Device-Circuit Interaction -- PERCIES: Providing Efficient Reliability in Critical Embedded Systems.

In: Springer Nature eBook

Additional Edition: 3030520161

Language: English

Keywords: Electronic books. ; Electronic books.

DOI: 10.1007/978-3-030-52017-5

URL: SpringerLink

URL: SpringerLink

URL: https://whel-primo.hosted.exlibrisgroup.com/openurl/44WHELF_BANG/44WHELF_BANG_services_page?u.ignore_date_coverage=true&rft.mms_id=991004942200602422

URL: Click here to view book

URL: DOAB Directory of Open Access Books

URL: https://library.oapen.org/bitstream/20.500.12657/43279/1/2021_Book_DependableEmbeddedSystems.pdf

UID:

Format: 1 online resource (606 pages)

ISBN: 9783030520175

Series Statement: Embedded Systems Ser.

Note: Intro -- Preface -- Fabrication and Design-Time Effects -- Yield and Process Variations -- Complexity -- Operation and Run-Time Effects -- Aging Effects -- Thermal Effects -- Soft Errors -- Contents -- RAP Model-Enabling Cross-Layer Analysis and Optimization for System-on-Chip Resilience -- 1 Introduction/Motivation -- 2 Resilience Articulation Point (RAP) Basics -- 3 Related Work -- 4 Fault Abstraction at Lower Levels -- 4.1 SRAM Errors -- 4.1.1 SRAM Errors due to Particle Strikes (Qcrit) -- 4.1.2 SRAM Errors due to Noise (SVNM) -- 4.1.3 SRAM Errors Due to Read/Write Failures (Read Delay/WTV) -- 4.1.4 SRAM Errors due to Supply Voltage Drop -- 5 Architecture Level Analysis and Countermeasures -- 5.1 Instruction Vulnerability -- 5.2 Data Vulnerability Analysis and Mitigation -- 5.3 Dynamic Testing -- 6 Application-Level Optimization-Autonomous Robot -- References -- Part I Cross-Layer from Operating System to Application -- Soft Error Handling for Embedded Systems using Compiler-OS Interaction -- 1 New Requirements for Fault Tolerance -- 2 Semantics of Errors -- 3 FEHLER System Overview and Semantic Annotations -- 4 Timing Behavior -- 5 Static Analyses -- 6 FEHLER Runtime System -- 7 Use Case: A Fault-Tolerant QoS-Aware Soft Real-time Application -- 8 Use Case: Adaptive Error Handling in Control Applications -- 9 Application of FEHLER to Approximate Computing -- 10 Summary and Outlook -- References -- ASTEROID and the Replica-Aware Co-schedulingfor Mixed-Criticality -- 1 The ASTEROID Project -- 1.1 Motivation -- 1.2 Overview -- 2 Replica-Aware Co-scheduling for Mixed-Criticality -- 2.1 Motivation -- 2.2 Related Work -- 3 System, Task, and Error Models -- 3.1 System Model -- 3.2 Task Model -- 3.3 Error Model -- 3.4 Offsets -- 4 Response-Time Analysis -- 4.1 Fork-Join Tasks -- 4.2 Independent Tasks -- 4.3 Error Recovery -- 5 Experimental Evaluation. , 5.1 Evaluation with Benchmark Applications -- 5.1.1 Characterization -- 5.1.2 Evaluation of Fork-Join Tasks -- 5.1.3 Evaluation of Independent Tasks -- 5.2 Evaluation with Synthetic Workload -- 5.2.1 Evaluation of Fork-Join Tasks -- 5.2.2 Evaluation of Independent Tasks -- 6 Conclusion -- References -- Dependability Aspects in Configurable Embedded OperatingSystems -- 1 Introduction -- 2 Related Work -- 3 dOSEK: A Dependable RTOS for Automotive Applications -- 3.1 Development of a Fault-Avoiding Operating System -- 3.2 Implementing a Fault-Detecting Operating System -- 3.3 Evaluation -- 3.3.1 Fault-Injection Results -- 3.3.2 Memory- and Runtime Costs -- 4 Modularizing Software-Based Memory Error Detection and Correction -- 4.1 Generic Object Protection with AspectC++ -- 4.1.1 Generic Introductions by Compile-Time Introspection -- 4.1.2 Advice for Control Flow and Data Access -- 4.2 Implementation and Evaluation -- 4.2.1 EDM/ERM Variants -- 4.2.2 Evaluation Setup -- 4.2.3 Optimizing the Generic Object Protection -- 4.2.4 Protection Effectiveness and Overhead -- 4.3 Discussion -- 5 Conserving Consistent State in Persistent Memory with Software Transactional Memory -- 5.1 System Model -- 5.2 Concepts of DNV Memory -- 5.3 Evaluation -- 5.4 Discussion -- 6 Summary -- References -- Part II Cross-Layer Dependability: From Architecture to Software and Operating System -- Increasing Reliability Using Adaptive Cross-Layer Techniques in DRPs: Just-Safe-Enough Responses to Reliability Threats -- 1 Introduction -- 2 Dynamically Reconfigurable Processors -- 3 Exploiting Architectural Redundancy for Increased Reliability -- 3.1 Realizing Low-Cost TMR Using PE Clusters -- 3.2 DRPs as Redundancy for CPU Pipelines -- 3.3 Dynamic Testing -- 3.4 Dynamic Remapping -- 3.5 Testing Reliability Schemes in Hardware -- 4 Device-Level State and Countermeasures. , 5 Synergistic Effects of Cross-Layer Approaches -- 6 Conclusion -- References -- Dependable Software Generation and Execution on EmbeddedSystems -- 1 Overview -- 2 Dependability Modeling and Estimation -- 3 Dependability-Driven Compilation -- 3.1 Dependability-Driven Software Transformations -- 3.2 Dependability-Driven Instruction Scheduling -- 3.3 Dependability-Driven Selective Instruction Redundancy -- 4 Dependability-Driven System Software -- 4.1 Joint Consideration of Functional and Timing Dependability -- 4.2 Adaptive Dependability Tuning in Multi-Core Systems -- 5 Resilient Design for System Software -- 5.1 Adaptive Soft Error Handling -- 5.2 Dynamic Real-Time Guarantees -- 5.3 Probabilistic Deadline-Miss Analyses -- 6 Application-Specific Dependability -- 7 Conclusion -- References -- Fault-Tolerant Computing with Heterogeneous Hardening Modes -- 1 Introduction -- 2 Fault-Tolerant Heterogeneous Processors -- 2.1 Hardening Embedded Processors -- 2.2 Reliability Techniques for Multi-Level Caches -- 2.2.1 Improving the Reliability of Last-Level Caches -- 2.2.2 Improving the Reliability of the Complete Cache Hierarchy -- 3 Heterogeneous Reliability Modes of Out-of-Order Superscalar Cores -- 3.1 Experimental Setup -- 3.2 Vulnerability Analysis of Out-of-Order Superscalar Processors -- 3.3 Methodology for Hardening Out-of-Order Superscalar Processors -- 3.3.1 Full-Processor Vulnerability Factor -- 3.3.2 Heterogeneous Reliability Modes for ALPHA Cores -- 3.3.3 State Compression Techniques -- 4 Run-Time Systems for Heterogeneous Fault-Tolerance -- 5 Conclusion -- References -- Thermal Management and Communication Virtualization for Reliability Optimization in MPSoCs -- 1 Overview -- 2 Impact of Temperature on Reliability -- 3 Temperature Estimation via Simulation or Measurement -- 3.1 Thermal Simulation -- 3.2 Thermal Measurement. , 4 Modeling Impact of Temperature at System Level -- 4.1 Figures of Merit -- 4.2 Direct Impact of Temperature -- 4.3 Aging as Indirect Impact of Temperature -- 5 System-Level Management -- 5.1 Voltage Scaling -- 5.2 Task Migration -- 6 Architecture Support -- 6.1 NoC Virtualization -- 6.2 Advanced Communication Reconfiguration Using Protection Switching -- 6.3 Adaptive Modular Redundancy (AMR) -- 7 Cross-Layer -- 8 Conclusion -- References -- Lightweight Software-Defined Error Correction for Memories -- 1 Software-Defined Error Correcting Codes (SDECC) -- 1.1 SDECC Theory -- 1.1.1 Computing the List of Candidates -- 1.1.2 SDECC Analysis of Existing ECCs -- 1.2 SDECC Architecture -- 1.3 Data Recovery Policy -- 1.3.1 Observations on Data Similarity -- 1.4 Reliability Evaluation -- 1.4.1 Methodology -- 1.4.2 Recovery Breakdown -- 2 Software-Defined Error-Localizing Codes (SDELC): Lightweight Recovery from Soft Faults at Runtime -- 2.1 Ultra-Lightweight Error-Localizing Codes (UL-ELC) -- 2.2 Recovering SEUs in Instruction Memory -- 2.3 Recovering SEUs in Data Memory -- 2.4 SDELC Architecture -- 2.5 Soft Fault Recovery Using SDELC -- 2.5.1 Overall Results -- 3 Parity++ : Lightweight Error Correction for Last Level Caches and Embedded Memories -- 3.1 Application Characteristics -- 3.2 Parity++ Theory -- 3.3 Error Detection and Correction -- 3.4 Architecture -- 3.5 Experimental Methodology -- 3.6 Results and Discussion -- References -- Resource Management for Improving Overall Reliability of Multi-Processor Systems-on-Chip -- 1 Introduction -- 1.1 Background -- 1.2 Related Work -- 1.3 Soft-Error Reliability Model -- 1.4 Lifetime Reliability Model -- 2 LTR and SER Optimization -- 2.1 LTR Optimization -- 2.2 SER Optimization -- 3 Trade-Off Between LTR and SER -- 3.1 ``Big-Little'' MPSoCs -- 3.2 CPU-GPU Integrated MPSoCs -- 4 Conclusion -- References. , Part III Cross-Layer Resilience: Bridging the Gap Between Circuit and Architectural Layer -- Cross-Layer Resilience Against Soft Errors: Key Insights -- 1 Introduction -- 2 Evaluation of Soft Error Resilience Using Fault Injection -- 2.1 Overview on Fault Injection Methods -- 2.2 Simulation-Based Fault Injection -- 2.3 Fast Fault Injection for Processor Cores -- 2.3.1 Multi-Level Fault Injection -- 2.3.2 Switch from ISS Mode to Flip-Flop-Level Simulation -- 2.3.3 Switch from Flip-Flop-Level Simulation Back to ISS Mode -- 2.4 Fast Fault Injection in Uncore Components -- 2.5 Fast Fault Injection for SRAM Memories Using Mixture Importance Sampling -- 3 Cross-Layer Exploration of Soft Error Resilience Techniques -- 3.1 CLEAR: Cross-Layer Resilience for Custom Processors -- 3.1.1 Reliability Analysis -- 3.1.2 Execution Time Evaluation -- 3.1.3 Physical Design Evaluation -- 3.1.4 Resilience Library -- 3.1.5 Exploration -- 3.2 Resilience Exploration for Custom Accelerators -- 3.3 Cross-Layer Resilience for Exploration for SRAM Memories -- 3.4 Towards Cross-Layer Resiliency for Cyber-Physical Systems (CPS) -- 4 Experimental Results -- 4.1 Accuracy of FI at Different Abstraction Levels -- 4.2 Cross-Layer Resilience Exploration with CLEAR -- 4.3 Resilience Exploration for Custom Accelerators -- 4.4 Resilience Exploration for Fixed-hardware Micro-Controller -- 4.5 Resilience Exploration for SRAM Cache of Self-Balancing Robot -- 5 Conclusions -- References -- Online Test Strategies and Optimizations for Reliable Reconfigurable Architectures -- 1 Introduction and Motivation -- 1.1 Application Model -- 1.2 Runtime-Reconfigurable Architectures -- 2 Fault Detection Through Strategic Online Testing -- 2.1 Generation and Runtime Scheduling of Online Tests -- 2.2 Online Test Integration -- 2.3 Experimental Evaluation -- 3 Self-Repair by Module Diversification. , 3.1 Diversified Configurations.

Additional Edition: Print version: Henkel, Jörg Dependable Embedded Systems Cham : Springer International Publishing AG,c2020 ISBN 9783030520168

Language: English

Keywords: Electronic books.

URL: Click to View

UID:

Format: 1 online resource (XIII, 608 p. 293 illus., 250 illus. in color.)

Edition: 1st edition 2021.

ISBN: 3-030-52017-X

Series Statement: Embedded systems (Springer (Firm))

Content: This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.

Note: Introduction -- Design of efficient, dependable SoCs based on cross-layer-reliability approach with emphasis on wireless communication as application and DRAM memories -- CRAU: Compositional System-Level Reliability Analysis in the Presence of Uncertainties -- Semantics-aware Soft Error Handling for Embedded Systems using Compiler-OS Interaction -- ARES: Self-Adaptive Coarse-Grained Reconfigurable Architectures as Reliability Enhancers in Embedded Systems -- Cross-Layer Techniques for Dependable Software Execution on Embedded Systems -- Ambrosia: Cross-layer Modeling and Mitigation of Aging Effects in Embedded Systems -- Cross-Layer Dependability for Embedded Hardware/Software Systems -- Fault-Tolerant Computing with Heterogeneous Hardware/Software Hardening Modes -- Robust Computing for Machine Learning-Based Systems -- Hardening embedded system software -- LIFT: Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach -- VirTherm-3D: Communication Virtualization Enabling System Management for Dependable 3D MPSoCs -- OTERA: Online Test Strategies for Reliable Reconfigurable Architectures -- Variability-Aware Software: Recent Results and Contributions -- EM Lifetime Constrained Optimization for Multi-Segment Power Grid Networks -- Lightweight Software-Assisted Memory Error Correction -- Reliability-Driven Resource Management for Multi-Core Systems-on-Chip -- Monitor Circuits for Device-Circuit Interaction -- PERCIES: Providing Efficient Reliability in Critical Embedded Systems. , English

Additional Edition: ISBN 3-030-52016-1

Language: English

DOI: 10.1007/978-3-030-52017-5

UID:

Format: 1 online resource (XIII, 608 p. 293 illus., 250 illus. in color.)

Edition: 1st edition 2021.

ISBN: 3-030-52017-X

Series Statement: Embedded systems (Springer (Firm))

Content: This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.

Note: Introduction -- Design of efficient, dependable SoCs based on cross-layer-reliability approach with emphasis on wireless communication as application and DRAM memories -- CRAU: Compositional System-Level Reliability Analysis in the Presence of Uncertainties -- Semantics-aware Soft Error Handling for Embedded Systems using Compiler-OS Interaction -- ARES: Self-Adaptive Coarse-Grained Reconfigurable Architectures as Reliability Enhancers in Embedded Systems -- Cross-Layer Techniques for Dependable Software Execution on Embedded Systems -- Ambrosia: Cross-layer Modeling and Mitigation of Aging Effects in Embedded Systems -- Cross-Layer Dependability for Embedded Hardware/Software Systems -- Fault-Tolerant Computing with Heterogeneous Hardware/Software Hardening Modes -- Robust Computing for Machine Learning-Based Systems -- Hardening embedded system software -- LIFT: Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach -- VirTherm-3D: Communication Virtualization Enabling System Management for Dependable 3D MPSoCs -- OTERA: Online Test Strategies for Reliable Reconfigurable Architectures -- Variability-Aware Software: Recent Results and Contributions -- EM Lifetime Constrained Optimization for Multi-Segment Power Grid Networks -- Lightweight Software-Assisted Memory Error Correction -- Reliability-Driven Resource Management for Multi-Core Systems-on-Chip -- Monitor Circuits for Device-Circuit Interaction -- PERCIES: Providing Efficient Reliability in Critical Embedded Systems. , English

Additional Edition: ISBN 3-030-52016-1

Language: English

DOI: 10.1007/978-3-030-52017-5

UID:

Format: 1 online resource (XIII, 608 p. 293 illus., 250 illus. in color.)

Edition: 1st edition 2021.

ISBN: 3-030-52017-X

Series Statement: Embedded systems (Springer (Firm))

Content: This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today’s points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.

Note: Introduction -- Design of efficient, dependable SoCs based on cross-layer-reliability approach with emphasis on wireless communication as application and DRAM memories -- CRAU: Compositional System-Level Reliability Analysis in the Presence of Uncertainties -- Semantics-aware Soft Error Handling for Embedded Systems using Compiler-OS Interaction -- ARES: Self-Adaptive Coarse-Grained Reconfigurable Architectures as Reliability Enhancers in Embedded Systems -- Cross-Layer Techniques for Dependable Software Execution on Embedded Systems -- Ambrosia: Cross-layer Modeling and Mitigation of Aging Effects in Embedded Systems -- Cross-Layer Dependability for Embedded Hardware/Software Systems -- Fault-Tolerant Computing with Heterogeneous Hardware/Software Hardening Modes -- Robust Computing for Machine Learning-Based Systems -- Hardening embedded system software -- LIFT: Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach -- VirTherm-3D: Communication Virtualization Enabling System Management for Dependable 3D MPSoCs -- OTERA: Online Test Strategies for Reliable Reconfigurable Architectures -- Variability-Aware Software: Recent Results and Contributions -- EM Lifetime Constrained Optimization for Multi-Segment Power Grid Networks -- Lightweight Software-Assisted Memory Error Correction -- Reliability-Driven Resource Management for Multi-Core Systems-on-Chip -- Monitor Circuits for Device-Circuit Interaction -- PERCIES: Providing Efficient Reliability in Critical Embedded Systems. , English

Additional Edition: ISBN 3-030-52016-1

Language: English

DOI: 10.1007/978-3-030-52017-5

UID:

Format: 1 online resource (606 pages)

ISBN: 9783030520175

Series Statement: Embedded Systems Ser.

Content: Intro -- Preface -- Fabrication and Design-Time Effects -- Yield and Process Variations -- Complexity -- Operation and Run-Time Effects -- Aging Effects -- Thermal Effects -- Soft Errors -- Contents -- RAP Model-Enabling Cross-Layer Analysis and Optimization for System-on-Chip Resilience -- 1 Introduction/Motivation -- 2 Resilience Articulation Point (RAP) Basics -- 3 Related Work -- 4 Fault Abstraction at Lower Levels -- 4.1 SRAM Errors -- 4.1.1 SRAM Errors due to Particle Strikes (Qcrit) -- 4.1.2 SRAM Errors due to Noise (SVNM) -- 4.1.3 SRAM Errors Due to Read/Write Failures (Read Delay/WTV) -- 4.1.4 SRAM Errors due to Supply Voltage Drop -- 5 Architecture Level Analysis and Countermeasures -- 5.1 Instruction Vulnerability -- 5.2 Data Vulnerability Analysis and Mitigation -- 5.3 Dynamic Testing -- 6 Application-Level Optimization-Autonomous Robot -- References -- Part I Cross-Layer from Operating System to Application -- Soft Error Handling for Embedded Systems using Compiler-OS Interaction -- 1 New Requirements for Fault Tolerance -- 2 Semantics of Errors -- 3 FEHLER System Overview and Semantic Annotations -- 4 Timing Behavior -- 5 Static Analyses -- 6 FEHLER Runtime System -- 7 Use Case: A Fault-Tolerant QoS-Aware Soft Real-time Application -- 8 Use Case: Adaptive Error Handling in Control Applications -- 9 Application of FEHLER to Approximate Computing -- 10 Summary and Outlook -- References -- ASTEROID and the Replica-Aware Co-schedulingfor Mixed-Criticality -- 1 The ASTEROID Project -- 1.1 Motivation -- 1.2 Overview -- 2 Replica-Aware Co-scheduling for Mixed-Criticality -- 2.1 Motivation -- 2.2 Related Work -- 3 System, Task, and Error Models -- 3.1 System Model -- 3.2 Task Model -- 3.3 Error Model -- 3.4 Offsets -- 4 Response-Time Analysis -- 4.1 Fork-Join Tasks -- 4.2 Independent Tasks -- 4.3 Error Recovery -- 5 Experimental Evaluation.

Note: Description based on publisher supplied metadata and other sources

Additional Edition: ISBN 9783030520168

Additional Edition: Erscheint auch als Druck-Ausgabe ISBN 9783030520168

Language: English

URL: lizenzpflichtig

UID:

Format: XIII, 608 p. 293 illus., 250 illus. in color. , online resource.

Edition: 1st ed. 2021.

ISBN: 9783030520175

Series Statement: Embedded Systems,

Content: This Open Access book introduces readers to many new techniques for enhancing and optimizing reliability in embedded systems, which have emerged particularly within the last five years. This book introduces the most prominent reliability concerns from today's points of view and roughly recapitulates the progress in the community so far. Unlike other books that focus on a single abstraction level such circuit level or system level alone, the focus of this book is to deal with the different reliability challenges across different levels starting from the physical level all the way to the system level (cross-layer approaches). The book aims at demonstrating how new hardware/software co-design solution can be proposed to ef-fectively mitigate reliability degradation such as transistor aging, processor variation, temperature effects, soft errors, etc. Provides readers with latest insights into novel, cross-layer methods and models with respect to dependability of embedded systems; Describes cross-layer approaches that can leverage reliability through techniques that are pro-actively designed with respect to techniques at other layers; Explains run-time adaptation and concepts/means of self-organization, in order to achieve error resiliency in complex, future many core systems.

Note: Introduction -- Design of efficient, dependable SoCs based on cross-layer-reliability approach with emphasis on wireless communication as application and DRAM memories -- CRAU: Compositional System-Level Reliability Analysis in the Presence of Uncertainties -- Semantics-aware Soft Error Handling for Embedded Systems using Compiler-OS Interaction -- ARES: Self-Adaptive Coarse-Grained Reconfigurable Architectures as Reliability Enhancers in Embedded Systems -- Cross-Layer Techniques for Dependable Software Execution on Embedded Systems -- Ambrosia: Cross-layer Modeling and Mitigation of Aging Effects in Embedded Systems -- Cross-Layer Dependability for Embedded Hardware/Software Systems -- Fault-Tolerant Computing with Heterogeneous Hardware/Software Hardening Modes -- Robust Computing for Machine Learning-Based Systems -- Hardening embedded system software -- LIFT: Lifting Device-Level Characteristics for Error Resilient System Level Design: A Crosslayer Approach -- VirTherm-3D: Communication Virtualization Enabling System Management for Dependable 3D MPSoCs -- OTERA: Online Test Strategies for Reliable Reconfigurable Architectures -- Variability-Aware Software: Recent Results and Contributions -- EM Lifetime Constrained Optimization for Multi-Segment Power Grid Networks -- Lightweight Software-Assisted Memory Error Correction -- Reliability-Driven Resource Management for Multi-Core Systems-on-Chip -- Monitor Circuits for Device-Circuit Interaction -- PERCIES: Providing Efficient Reliability in Critical Embedded Systems.

In: Springer Nature eBook

Additional Edition: Printed edition: ISBN 9783030520168

Additional Edition: Printed edition: ISBN 9783030520182

Additional Edition: Printed edition: ISBN 9783030520199

Language: English

DOI: 10.1007/978-3-030-52017-5

URL: https://doi.org/10.1007/978-3-030-52017-5