Format:
Online-Ressource (XVII, 139 p)
,
online resource
Edition:
Springer eBook Collection. Computer Science
ISBN:
9781447101895
Series Statement:
Distinguished Dissertations
Content:
Asynchronous System-on-Chip Interconnect describes the use of an entirely asynchronous system-bus for the modular construction of integrated circuits. Industry is just awakening to the benefits of asynchronous design in avoiding the problems of clock-skew and multiple clock-domains, an din parallel with this is coming to grips with Intellectual Property (IP) based design flows which emphasise the need for a flexible interconnect strategy. In this book, John Bainbridge investigates the design of an asynchronous on-chip interconnect, looking at all the stages of the design from the choice of wiring layout, through asynchronous signalling protocols to the higher level problems involved in supporting split transactions. The MARBLE bus (the first asynchronous SoC bus) used in a commercial demonstrator chip containing a mixture of asynchronous and synchronous macrocells is used as a concrete example throughout the book
Note:
IntroductionAsynchronous Design -- System Level Interconnect Principles -- The Physical (Wire) Layer -- The Link Layer -- Protocol Layer -- Transaction Layer -- Marble: A Dual Channel Split Transfer Bus -- Evaluation -- Conclusion -- Appendix A: Marble Schematics -- References -- Index.
Additional Edition:
ISBN 9781447111122
Additional Edition:
Erscheint auch als Druck-Ausgabe ISBN 9781447111122
Additional Edition:
Erscheint auch als Druck-Ausgabe ISBN 9781447101901
Additional Edition:
Erscheint auch als Druck-Ausgabe ISBN 9781852335984
Language:
English
DOI:
10.1007/978-1-4471-0189-5
URL:
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