In:
Applied Physics Letters, AIP Publishing, Vol. 98, No. 12 ( 2011-03-21)
Abstract:
This work investigates an improvement in anomalous on-current and subthreshold swing (SS) in Low-temperature polycrystalline-silicon thin-film transistors after positive gate bias stress. The experimental results reveal that the improved electric properties are due to the hole trapping at SiO2 above the lightly doped drain regions, which causes a strong electric field at the gate corners. The effect of the hole trapping is to reduce the effective channel length and the SS. Besides, the stress-related electric field was also simulated by TCAD software to verify the mechanism above.
Type of Medium:
Online Resource
ISSN:
0003-6951
,
1077-3118
Language:
English
Publisher:
AIP Publishing
Publication Date:
2011
detail.hit.zdb_id:
211245-0
detail.hit.zdb_id:
1469436-0