In:
Applied Physics Letters, AIP Publishing, Vol. 122, No. 9 ( 2023-02-27)
Abstract:
A fan-out circuit is a basic block for scaling up digital circuits for overcoming the limited driving capability of a single logic gate. It is particularly important for superconducting digital circuits as the driving power is typically weak for having high energy efficiency. Here, we design and fabricate a fan-out circuit for a superconducting nanowire cryotron (nTron) digital circuit. A classic splitter tree architecture is adopted. To transmit switching signal and avoid crosstalk among nTrons, we introduced an “R–L–R” interface circuit. Experimentally, a two-stage splitter tree of a fan-out number of four was demonstrated. Correct operation was observed with a minimum bit error rate (BER) of 10−6. The bias margin was 10% at BER of 10−4. The average time jitter was 82 ps. Moreover, crosstalk was not observed. Based on these results, we envision that the fan-out circuit can be used in future development of superconducting-nanowire-based circuits.
Type of Medium:
Online Resource
ISSN:
0003-6951
,
1077-3118
Language:
English
Publisher:
AIP Publishing
Publication Date:
2023
detail.hit.zdb_id:
211245-0
detail.hit.zdb_id:
1469436-0