In:
ECS Transactions, The Electrochemical Society, Vol. 69, No. 3 ( 2015-09-09), p. 85-95
Abstract:
One of the key challenges in the development of embedded memory solutions is to ensure their compatibility to CMOS processing and to reduce the added complexity to a minimum. Especially the parallel implementation of charge based one-transistor memories in the FEoL, such as e.g. floating gate devices, together with advanced transistor technologies proves rather challenging. In contrast to that, an alternative one-transistor memory concept based on ferroelectric hafnium oxide closely resembles state of the art high-k metal gate devices and therewith promises a greatly simplified integration. Here we investigate the impact of strain, thermal budget and work function engineering, usually applied to high-k metal gate technologies, on material properties as well as on the memory performance of hafnium oxide based ferroelectric field effect transistors. Key challenges related to a modified gate etch and the integration of different hafnium oxide thicknesses will be discussed.
Type of Medium:
Online Resource
ISSN:
1938-5862
,
1938-6737
DOI:
10.1149/06903.0085ecst
Language:
Unknown
Publisher:
The Electrochemical Society
Publication Date:
2015