In:
Energies, MDPI AG, Vol. 14, No. 13 ( 2021-06-27), p. 3866-
Abstract:
Wide-bandgap technology evolution compels the advancement of efficient pulse-width gate-driver devices. Integrated enhanced gate-driver planar transformers are a source of electromagnetic disturbances due to inter-winding capacitances, which serve as a route to common-mode (CM) currents. This paper will simulate, via ANSYS Q3D Extractor, the unforeseen parasitic effects of a pulse planar transformer integrated in a SiC MOSFET gate-driver card. Moreover, the pulse transformer will be ameliorated by adding distinctive shielding layers aiming to suppress CM noise effects and endure high dv/dt occurrences intending to validate experimental tests. The correlation between stray capacitance and dv/dt immunity results after shielding insertion will be reported.
Type of Medium:
Online Resource
ISSN:
1996-1073
Language:
English
Publisher:
MDPI AG
Publication Date:
2021
detail.hit.zdb_id:
2437446-5