In:
International Symposium on Microelectronics, IMAPS - International Microelectronics Assembly and Packaging Society, Vol. 2011, No. 1 ( 2011-01-01), p. 000001-000007
Abstract:
In this study, key enabling technologies such as the oxide liner by the PECVD, the barrier and seed layers by the PVD, and Cu-plating of blind TSVs on 300mm wafers for 3D integration are investigated. Emphases are placed on the determination and optimization of the important parameters for each of the key enabling technologies. Also, leakage currents of the fabricated Cu-filled TSVs are measured. Furthermore cross sections and SEM of the fabricated TSVs are provided and examined.
Type of Medium:
Online Resource
ISSN:
2380-4505
DOI:
10.4071/isom-2011-TA1-Paper1
Language:
English
Publisher:
IMAPS - International Microelectronics Assembly and Packaging Society
Publication Date:
2011