In:
International Symposium on Microelectronics, IMAPS - International Microelectronics Assembly and Packaging Society, Vol. 2011, No. 1 ( 2011-01-01), p. 000208-000214
Abstract:
This paper proposes a 3D IC integration TSV testing apparatus, primarily using at least one set of TSV component testing devices with a specific design. Under complex technological conditions, such as varying depth-width ratios of TSVs and heterogeneous IC integration, as well as the principle of different coupling parasitic parameters between TSVs, the TSV coupling measuring device designed for specific purposes in coordination with a measuring method for high-frequency coupling TSV S-parameters, achieving the function of monitoring the SiO2 thickness of TSVs. This feasible approach further allows judgment of whether subsequent processes can continue, effectively reducing costs.
Type of Medium:
Online Resource
ISSN:
2380-4505
DOI:
10.4071/isom-2011-TP1-Paper5
Language:
English
Publisher:
IMAPS - International Microelectronics Assembly and Packaging Society
Publication Date:
2011